Nonlinear Switched-Capacitor Networks: Basic Principles and Piecewise-Linear Design [PDF]
, 1985 The applicability of switched-capacitor (SC) components to the design of nonlinear networks is extensively discussed in this paper. The main objective is to show that SC's can be efficiently used for designing nonlinear networks.
Chua, Leon O. +3 more
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Reducing MOSFET 1/f Noise and Power Consumption by "Switched Biasing" [PDF]
, 2000 Switched biasing is proposed as a technique for reducing the 1/f noise in MOSFET's. Conventional techniques, such as chopping or correlated double sampling, reduce the effect of 1/f noise in electronic circuits, whereas the switched biasing technique ...
Gierkink, Sander L.J. +3 more
core +2 more sources
Double-Sampling Single-Loop EA Modulator Topologies for Broad-band Applications [PDF]
, 2006 This paper presents novel double sampling high-order single loop sigma-delta modulator structures for wide-band applications. To alleviate the quantization noise folding into the inband frequency region, two previously reported techniques are used.
Rodríguez Vázquez, Ángel Benito +2 more
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Effects of Non-Idealities of OP-AMPs on Active Filters: An Analytical Study
Active and Passive Electronic Components, 1994 This paper studies the effect of non-idealities of OP AMPs on the performance of active filters. The non-ideality is considered in terms of finite gain, finite gain-bandwidth product, slew-rate, and offset voltages.
Prem Bhushan Mital, Umesh Kumar
doaj +1 more source
Design and Analytical Study of Strays-Insensitive Switched-Capacitor Filters
Active and Passive Electronic Components, 1996 Use of analog circuit elements in active networks have become very common and the demand for their miniaturization is increasing day by day. Though several methods are available for the miniaturization of these elements through large scale integration on
Umesh Kumar
doaj +1 more source
Multirate cascaded discrete-time low-pass ΔΣ modulator for GSM/Bluetooth/UMTS [PDF]
, 2010 This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility with the sampling frequency. The
Bos, Lynn +4 more
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A 12MHz Switched-Capacitor Relaxation Oscillator with a Nearly Minimal FoM of -161dBc/Hz [PDF]
, 2008 In this work the phase noise performance of relaxation oscillators has been analyzed resulting in simple though precise phase noise expressions. These expressions have lead to a new relaxation oscillator topology, which exploits a noise filtering ...
Geraedts, P.F.J. +4 more
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A 90μW 12MHz Relaxation Oscillator with a -162dB FOM [PDF]
, 2008 A relaxation oscillator exploits a noise filtering technique implemented with a switched-capacitor circuit to minimize phase noise. A 65nm CMOS design produces a sawtooth waveform, has a frequency tuning range of 1 to 12MHz and a constant frequency ...
Geraedts, P.F.J. +4 more
core +2 more sources
CMOS-3D smart imager architectures for feature detection [PDF]
, 2012 This paper reports a multi-layered smart image sensor architecture for feature extraction based on detection of interest points. The architecture is conceived for 3-D integrated circuit technologies consisting of two layers (tiers) plus memory.
D. Cabello +6 more
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A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology [PDF]
, 1999 This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully differential switched-capacitor circuits with a clock frequency of 35.2 MHz, and has a power consumption of ...
Medeiro Hidalgo, Fernando +2 more
core +1 more source