Results 261 to 270 of about 2,603,336 (302)

System-level reliability analysis considering imperfect fault coverage

Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, 2017
Safety-critical systems rely on redundancy schemes such as k-out-of-n structures which enable tolerance against multiple faults. These techniques are subject to Imperfect Fault Coverage (IFC) as error detection and recovery might be prone to errors or even impossible for certain fault models.
Faramarz Khosravi, Hananeh Aliee, Jürgen Teich   +2 more
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Reliability-Driven System-Level Synthesis of Embedded Systems

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
This paper proposes an enhanced system-level synthesis flow for the design of reliable embedded systems, extending the classical process to introduce fault mitigation properties in the design under consideration. The strategy first explores the adoption of hardening techniques that, given the initial task graph and the user's reliability requirements ...
BOLCHINI, CRISTIANA, MIELE, ANTONIO ROSARIO   +1 more
openaire   +1 more source

System-level reliability exploration framework for heterogeneous MPSoC

Proceedings of the 24th edition of the great lakes symposium on VLSI, 2014
Power density of digital circuits increased at alarming rate for deep sub-micron CMOS technology, turning reliability into a serious design concern. On the other hand, ever-growing task complexity with strict performance budget forced designers to adopt complex, heterogeneous MPSoCs as the implementation choice.
Zheng Wang, Chao Chen, Piyush Sharma, Anupam Chattopadhyay   +3 more
openaire   +1 more source

Failure analysis and reliability on system level

Microelectronics Reliability, 2015
Abstract This tutorial paper describes an approach how to improve root-cause finding of electronic component failures by means of a system-related failure anamnesis approach. While traditional failure analysis tries to analyze on device level, this system-related method starts by providing a failure anamnesis on system level, systematically ...
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Structural reliability methodology — application at the system level

Nuclear Engineering and Design, 1978
Abstract This paper discusses the use of structural reliability methodology for general systems reliability analyses. It briefly discusses previous applications of this approach to several different types of systems. A description of the basic methodology is given followed by a discussion of the computational processes that are available for arriving
G.E. Ingram, C.R. Herrmann
openaire   +1 more source

System-Level Reliability Qualification of Complex Electronic Systems

Volume 5: Electronics and Photonics, 2009
Qualifying functional complex electronic systems and products for reliable performance under a given life cycle history is a difficult task, because of the complex competing aggregation of potential failure sites and failure modes. The current approach, driven by industry specifications and standards, is to conduct standardized tests that are intended ...
D. Farley, A. Dasgupta, M. Al-Bassyiouni, J. W. C. de Vries   +3 more
openaire   +1 more source

New Circuit Topology for System-Level Reliability of GaN

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2019
To accelerate GaN adoption, beyond-JEDEC system-level reliability should be done to prove the robustness of GaN in applications. In this paper, a new hard switching test vehicle (half-bridge RC load) was proposed & demonstrated to achieve system-like stress, flexibility of acceleration test, low system power consumption with large sample size, easy ...
Ming-Cheng Lin, Wen-Che Chang, Haw-Yun Wu, Gabriel Petrus Lansbergen, Man-Ho Kwan, Jiun-Lei Yu, Cheng-Pao Wu, Chun-Lin Tsai, Hsiao-Chin Tuan, Alex Kalnitsky   +9 more
openaire   +1 more source

System-Level Reliability Assessment of Mixed-Signal Convergent Microsystems

IEEE Transactions on Advanced Packaging, 2004
The next-generation convergent microsystems, based on system-on-package (SOP) technology, require up-front system-level design-for-reliability approaches and appropriate reliability assessment methodologies to guarantee the reliability of digital, optical, and radio frequency (RF) functions, as well as their interfaces.
R.V. Pucha, S. Hegde, M. Damani, K. Tunga, A. Perkins, S. Mahalingam, G. Ramakrishna, G.C. Lo, K. Klein, J. Ahmad, S.K. Sitaraman   +10 more
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System-level modeling and reliability analysis of microprocessor systems

5th IEEE International Workshop on Advances in Sensors and Interfaces IWASI, 2013
In this paper, we have developed a framework to study wearout of state-of-the-art microprocessor systems. Taking into account the detailed thermal and electrical stress profiles, which are determined by running benchmarks on the system, we present a methodology to accurately estimate the lifetime due to each mechanism.
Chang-Chih Chen, Linda Milor
openaire   +1 more source

Reliability Improvement through Redundancy at Various System Levels

IBM Journal of Research and Development, 1958
Improvement in computing machine reliability through redundancy is studied as a function of the level at which the redundancy is applied. The reliability achieved by redundancy of complete, independent machines is compared to that achieved by redundancy of smaller units. A machine unit is termed m times redundant when the following conditions exist:
openaire   +1 more source