Results 141 to 150 of about 9,375,541 (161)

Impact of Voltage Bias on Through Silicon Vias (TSV) Depletion and Crosstalk

open access: yes, 2016
In this work the circuit segmentation approach for the modeling of Through Silicon Vias (TSV) is extended to the presence of time domain non linear phenomena such as depletion and capacitance hysteresis.
Antonio Orlandi   +2 more
exaly   +2 more sources

Analysis and Reduction of Voltage Noise of Multi-Layer 3D IC With PEEC-Based PDN and Frequency-Dependent TSV Models

open access: yes, 2014
Three dimensional (3D) integrated circuit (IC) technology has been proposed and used to reduce the delay among layers by shortening interconnection with TSVs.
Ki Jin Han, Seungwon Kim
exaly   +2 more sources

Analysis of Most Optimal Multi-Unit Multi-Level Inverter Having Minimum Components and Lower Standing Voltage

IETE Technical Review (Institution of Electronics and Telecommunication Engineers, India), 2021
Saikat Majumdar   +2 more
exaly  

Implementation of an Optimum Reduced Components Multicell Multilevel Inverter (MC-MLI) for Lower Standing Voltage

IEEE Transactions on Industrial Electronics, 2020
Bidyut Mahato   +2 more
exaly  

“You Are Standing at the Bedside of a Patient Dying of Untreatable Cancer”

Ca-A Cancer Journal for Clinicians, 1959
Edward H Rynearson
exaly  

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