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Over Tenfold Increase in Current Amplification Due to Anisotropic Polymer Chain Alignment in Organic Electrochemical Transistors. [PDF]

Adv Mater
Bardagot O, Durand P, Guchait S, Wu HY, Heinzen I, Errafi W, Bouylout V, Pistillo A, Yang CY, Rebetez G, Cavassin P, Jismy B, Réhault J, Fabiano S, Brinkmann M, Leclerc N, Banerji N.   +16 more
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High Transconductance OGFETs

SPIE Proceedings, 1987
Submicron channel MESFETs with a special electrode arrangement, previously described by Colquhoun and Ebert l have been fabricated and characterized. This overlapped gate configuration allows the channel length of the device to be substantially shorter than the gate metallization length.
G. Ebert, A. Colquhoun
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CMOS Voltage Differencing Transconductance Amplifier with Linearly Adjustable Transconductance Gains

2019 5th International Conference on Engineering, Applied Sciences and Technology (ICEAST), 2019
In this work, a circuit configuration for the realization the CMOS voltage differencing transconductance amplifier (VDTA) with linear tunable transconductance and wide-input dynamic range is introduced. The circuit design technique is achieved by squaring the long-tail bias current of the differential-input voltage-to-current converter circuit.
Natchanai Roongmuanpha, Pratya Mongkolwai, Tattaya Pukkalanun, Worapong Tangsrirat   +3 more
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High transconductance nitride MOSHFETs

Materials Science and Engineering B, 2004
Abstract AlGaN/GaN metal-oxide-semiconductor heterojunction field effect transistors (MOSHFETs) were fabricated with photo-chemical vapor deposited (photo-CVD) oxide as the insulating layer. It was found that room temperature saturation I ds , maximum g m and gate voltage swing (GVS) of the devices were 1220 mA/mm, 240 mS/mm and 4.5 V ...
C.H Liu, C.K Wang, S.J Chang, Y.K Su
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Different operational transconductance amplifier topologies for obtaining very small transconductances

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353), 2002
A family of CMOS Operational Transconductance Amplifiers (OTA's) have been designed for very small G/sub M/'s (of the order of nA/V) in the moderate inversion region of operation using several design schemes such as current division, floating gate input stages and bulk driven techniques.
A. Veeravalli, E. Sanchez-Sinencio, J. Silva-Martinez   +2 more
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Operational Transconductance Amplifiers

2023
The foremost chapter gives the topic context of electrocardiography (ECG or EKG), a diagnostic procedure used to evaluate the heart's rhythm and record electrical Activity for different heart conditions. The electrical signal has three main components: P wave, QRS complex, and T wave.
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Transconductance amplifier structures with very small transconductances: a comparative design approach

IEEE Journal of Solid-State Circuits, 2002
A family of CMOS operational transconductance amplifiers (OTAs) has been designed for very small G/sub m/'s (of the order of nanoamperes per volt) with transistors operating in moderate inversion. Several OTA design schemes such as conventional, using current division, floating-gate, and bulk-driven techniques are discussed.
A. Veeravalli, E. Sanchez-Sinencio, J. Silva-Martinez   +2 more
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High-Transconductance Ingaas/Inaias Sisfets

[1991] 49th Annual Device Research Conference Digest, 1991
Summary form only given. SISFETs in the InGaAs/InAlAs lattice-matched-to-InP material system with record transconductance have been fabricated. These devices use an InGaAs channel layer grown on an InAlAs buffer layer grown on (and lattice matched to) a semi-insulating InP substrate.
T.N. Jackson, P.M. Solomon, M.A. Tischler, G.D. Pettit, F.J. Canora, J.F. DeGelormo, J.J. Bucchignano, S.J. Wind   +7 more
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Modified Gilbert transconductance multiplier

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), 2003
A novel multiplier is proposed. The design is based on a Gilbert multiplier with a negative resistance input transconductance stage. By replacing the emitter degenerated long-tail pair of Gilbert multiplier, the 'gain constant', linearity and gain accuracy are improved.
J. Lee, K. Hayatleh, F.J. Lidgey
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CMOS transconductance element

Proceedings of the IEEE, 1986
A cross-coupled, ratioed quad cell was described by Nedungad, and Viswanathan [1]. One useful property of the quad is that it enables a linear large-signal transconductance cell. The other property that can be exploited is that it gives an output current proportional to the square of a differential input signal.
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