Results 231 to 240 of about 106,049 (265)
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The Architecture of Vector Control

Limn
Can bricks be made to breathe?
Elizabeth McCormick   +2 more
openaire   +1 more source

Architecture independent short vector FFTs

2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221), 2002
This paper introduces an SIMD vectorization for FFTW-the "fastest Fourier transform in the west" proposed by Frigo and Johnson (see Proceedings of the ACM SIGPLAN '99 , p.169-180, 1999). The new method leads to an architecture independent short vector SIMD FFT vectorization that utilizes the architecture adaptivity of FFTW.
Franz Franchetti   +3 more
openaire   +1 more source

A vector dataflow architecture

Proceedings. PARBASE-90: International Conference on Databases, Parallel Architectures, and Their Applications, 2002
The author presents a vector data-flow (VDF) architecture which is based on the following design philosophy: increasing data granularity, whenever possible, by grouping together ordered sequences of data into logical structures called vectors; increasing node granularity by grouping together nodes, according to a partitioning algorithm, to form logical
openaire   +1 more source

The use of vector instructions of a processor architecture for emulating the vector instructions of another processor architecture

Programming and Computer Software, 2017
The complexity of software is ever increasing, and it requires more and more computational resources for its execution. A way to satisfy these requirements is the use of vector instructions that can operate with fixed-length vectors of data of the same.
openaire   +1 more source

Vector unit architecture for emotion synthesis

IEEE Micro, 2000
Two vector units embedded in the emotion engine chip support high-quality 3D graphics, emotion synthesis, and 300-MHz, 5.5-GFLOPS operation for the recently introduced PlayStation2 game entertainment system.
Atsushi Kunimatsu   +13 more
openaire   +1 more source

Concepts of the System/370 vector architecture

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87, 1987
This paper discusses the performance, complexity and system-integration considerations that shaped the System/370 Vector Architecture [1, 9]. The architecture is intended for compatible systems providing a range of price and performance. The paper reviews the reasons for choosing a register-oriented architecture with compound instructions over storage ...
Brian B. Moore   +3 more
openaire   +1 more source

Compiling for an indirect vector register architecture

Proceedings of the 5th conference on Computing frontiers, 2008
The iVMX architecture contains a novel vector register file of up to 4096 vector registers accessed indirectly via a mapping mechanism, providing compatibility with the VMX architecture, and potential for dramatic performance benefits [7]. The large number of vector registers and the unique indirection mechanism pose compilation challenges to be used ...
Nuzman D.   +3 more
openaire   +1 more source

Vector Computer Architecture and Processing Techniques

1981
Publisher Summary Vector- or array-processing computers are essentially designed to maximize the concurrent activities inside a computer and to match the bandwidth of data flow to the execution speed of various subsystems within a computer. This chapter reviews architectural advances in vector-processing computers.
Hwang, Kai   +2 more
openaire   +2 more sources

Registers Size Influence on Vector Architectures

1999
In this work we studied the influence of the vector register size over two different concepts of vector architectures. Long vector registers play an important role in a conventional vector architecture, however, even using highly vectorisable codes, only a small fraction of that large vector registers is used.
Luis Villa 0001   +2 more
openaire   +1 more source

Low-Complexity Distributed Arithmetic-Based Architecture for Inner-Product of Variable Vectors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023
Samrat Sabat, Pramod Meher, Anil Kali
exaly  

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