Results 281 to 290 of about 110,493 (310)
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VLSI architecture for motion vector quantization
IEEE Transactions on Consumer Electronics, 2003The paper present a novel VLSI architecture for block-matching operations based on motion vector quantizers (MVQs). Since the distribution of the MVQ check point locations is irregular, the usual VLSI architectures for regular block-matching processes may not be effective for the hardware implementation of the MVQ.
Wen-Jyi Hwang +3 more
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A vector coprocessor architecture for embedded systems
2011 International SoC Design Conference, 2011We developed a DSP for wireless base-band processing on handheld devices. The DSP is composed of a scalar CPU and a vector unit. The architecture of the vector unit inherits that of vector processors for super computers, and we customized it for embedded systems. We evaluated the processor using several programs.
Yi Ge +6 more
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Architecture independent short vector FFTs
2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221), 2002This paper introduces an SIMD vectorization for FFTW-the "fastest Fourier transform in the west" proposed by Frigo and Johnson (see Proceedings of the ACM SIGPLAN '99 , p.169-180, 1999). The new method leads to an architecture independent short vector SIMD FFT vectorization that utilizes the architecture adaptivity of FFTW.
Franz Franchetti +3 more
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A VLSI implementation of the VAX vector architecture
Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage, 2002A single-board implementation of the VAX vector architecture is described. The vector processor can be divided into three separate function units: the vector controller, implemented as a single chip; the arithmetic pipelines, implemented by four pairs of chips; and the load/store unit, implemented by one chip.
David M. Fenwick +3 more
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A Neurobiologically Plausible Vector Symbolic Architecture
2014 IEEE International Conference on Semantic Computing, 2014Vector Symbolic Architectures (VSA) are approaches to representing symbols and structured combinations of symbols as high-dimensional vectors. They have applications in machine learning and for understanding information processing in neurobiology.
Daniel E. Padilla, Mark D. McDonnell
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Vector Computer Architecture and Processing Techniques
1981Publisher Summary Vector- or array-processing computers are essentially designed to maximize the concurrent activities inside a computer and to match the bandwidth of data flow to the execution speed of various subsystems within a computer. This chapter reviews architectural advances in vector-processing computers.
Hwang, Kai +2 more
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Registers Size Influence on Vector Architectures
1999In this work we studied the influence of the vector register size over two different concepts of vector architectures. Long vector registers play an important role in a conventional vector architecture, however, even using highly vectorisable codes, only a small fraction of that large vector registers is used.
Luis Villa 0001 +2 more
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Low-Complexity Distributed Arithmetic-Based Architecture for Inner-Product of Variable Vectors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023Anil Kali +2 more
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Genre and specific features of the book of memoirs by E. B. Khalezova. Part 1. Autobiography
Trudy Kolʹskogo Naučnogo Centra RAN, 2022Anil Kali +2 more
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S-Vectors and TESA: Speaker Embeddings and a Speaker Authenticator Based on Transformer Encoder
IEEE/ACM Transactions on Audio Speech and Language Processing, 2022Narla John Metilda Sagaya Mary, S Umesh
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