Results 121 to 130 of about 30,856 (159)
A flowgraph semantics of VHDL: Toward a VHDL verification workbench in HOL [PDF]
Formal Methods in System Design, 1995 VHDL-based verification methods require a formalized semantics of this hardware description language. As it has been shown recently that flowgraphs are an excellent means for defining the semantics of VHDL, we also use them to formalize full VHDL. However, our approach differs in important aspects from previous works.
Reetz, Ralf, Kropf, Thomas
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Some of the next articles are maybe not open access.
1989
This chapter will provide a set of four design examples which exploit various features of VHDL. They are chosen from different domains to emphasize the generality of the language. For those designers who are just becoming familiar with the language, these examples can provide a good starting point for learning VHDL.
Cary Ussery +2 more
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This chapter will provide a set of four design examples which exploit various features of VHDL. They are chosen from different domains to emphasize the generality of the language. For those designers who are just becoming familiar with the language, these examples can provide a good starting point for learning VHDL.
Cary Ussery +2 more
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, 1993 VHDL is a comprehensive language for digital system design and documentation, encompassing system to gate levels of abstraction. This introduction to the language first provides a short history of the language, concentrating on the needs identified by the developers and on the principles behind the its design.
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, 1992 The purpose of this chapter could have been simply defined as a comparison between two hardware description languages: M and VHDL. But such a title would have been confusing, because these two languages cannot be compared feature by feature.
Jean-Michel Bergé +3 more
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Conference proceedings on 27th ACM/IEEE design automation conference - DAC '90, 1990
A validation suite for the IEEE standard VHSIC Hardware Description Language (VHDL) is discussed along with its executive manager. Test points are generated from the VHDL LRM (language reference manual) syntax diagrams and sentences. Each test in the suite contains a test header which is specially formatted and keeps information such as test point ...
Chakravarthy Kosaraju +3 more
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A validation suite for the IEEE standard VHSIC Hardware Description Language (VHDL) is discussed along with its executive manager. Test points are generated from the VHDL LRM (language reference manual) syntax diagrams and sentences. Each test in the suite contains a test header which is specially formatted and keeps information such as test point ...
Chakravarthy Kosaraju +3 more
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1992
Verilog is a hardware description language originally designed by Gateway for a proprietary simulation product. This company later merged with Cadence Design Systems, Inc. Since then, Verilog has been known and used as the language of the Cadence digital simulator.
Jean-Michel Bergé +3 more
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Verilog is a hardware description language originally designed by Gateway for a proprietary simulation product. This company later merged with Cadence Design Systems, Inc. Since then, Verilog has been known and used as the language of the Cadence digital simulator.
Jean-Michel Bergé +3 more
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Computer-Aided Design, 1990
Abstract An introduction to the Very High Speed Integrated Circuit Hardware Description Language is given. Its development is reviewed and its usefulness is discussed.
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Abstract An introduction to the Very High Speed Integrated Circuit Hardware Description Language is given. Its development is reviewed and its usefulness is discussed.
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2016
Based on the material presented in Chap. 4, there are a few observations about logic design that are apparent. First, the size of logic circuitry can scale quickly to the point where it is difficult to design by hand. Second, the process of moving from a high-level description of how a circuit works (e.g., a truth table) to a form that is ready to be ...
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Based on the material presented in Chap. 4, there are a few observations about logic design that are apparent. First, the size of logic circuitry can scale quickly to the point where it is difficult to design by hand. Second, the process of moving from a high-level description of how a circuit works (e.g., a truth table) to a form that is ready to be ...
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2016
In Kapitel 1 wurden bereits die wichtigsten Grundelemente digitaler Systeme vorgestellt. Eine digitale Hardware verarbeitet Informationen, indem die Eingangssignale zum Beispiel mithilfe von logischen Grundelementen, den Gattern, verknupft werden.
Marco Winzker +3 more
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In Kapitel 1 wurden bereits die wichtigsten Grundelemente digitaler Systeme vorgestellt. Eine digitale Hardware verarbeitet Informationen, indem die Eingangssignale zum Beispiel mithilfe von logischen Grundelementen, den Gattern, verknupft werden.
Marco Winzker +3 more
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Proceedings Sixth IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype, 2002
Prototyping has been used to develop electronic systems for a long time. In this work a new prototyping approach, that we named VHDL Virtual Prototyping, is introduced. The new approach introduces VHDL models as the hardware part of the system prototype.
L. Berrojo, S. Olcoz, L. Entrena
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Prototyping has been used to develop electronic systems for a long time. In this work a new prototyping approach, that we named VHDL Virtual Prototyping, is introduced. The new approach introduces VHDL models as the hardware part of the system prototype.
L. Berrojo, S. Olcoz, L. Entrena
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