Results 141 to 150 of about 1,192 (166)

Deep embedding VHDL

1995
It is shown how a significant subset of VHDL has been deep embedded in HOL along with the four abstraction types of hardware: behavioral, structural, data, temporal.
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Getting started with VHDL

Proceedings of International Conference on Microelectronic Systems Education, 2002
This paper describes a module developed by the author for the initial teaching of VHDL. A 'self-teach' approach is adopted whereby students with a minimum of tutor support can progress from a basic knowledge of digital logic to modelling an ALU in six three hour sessions.
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?????????????????????? ?????????? VHDL ?????? ???????????????????????????????? ???????????????????? ????????

2008
?????????????????????? ?????????????????????? ?????????? ???????????????? ???????????????????? ?????????????? ?????? ???????????????????????????????? ?????????????????? ??????- ?????????????????????????? ?????????? ?? ?????????????????? ???????????? ?? ?????????? ?? ?????????????????????????? ???????????? ?? ??????????????. ?????????????????? ??????????
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VHDL 1076.1-analog and mixed-signal extensions to VHDL

Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, 1997
Ernst Christen, Kenneth Bakalar
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???????????????????? ???????????????????? ???????????? ?????? ???????????????????????????? ?????????????????????? VHDL-???????????????? ???????????????? ??????????????????

2017
?????????????????????? ??????????????????, ?????????????????????? ???? ???????????????????? ?? ???????????????????? ?????????????????????????? ???????????????????????????????????? ?????????????????? ???????????????? ?????????????? ?????????????????????????????? ???????? ?????????????????? ???????????????? ?? ???????????????? ???????????????? ???????? ??
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A Formalisation of the VHDL Simulation Cycle

1993
The VHSIC Hardware Description Language (VHDL) has been gaining wide acceptance as a unifying HDL. It is, however, still a language in which the only way of validating a design is by careful simulation. With the aim of better understanding VHDL’s particular simulation process and eventually reasoning about it, we have developed a formalisation of VHDL ...
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???????????????????????????? ?????????????? ?? ?????????????????? ???????????? ???? ???????? ?? ???????????????????????????? ?????????? VHDL

2014
The structural realization of the PLD-based of a Xilinx type FPGA 32-bit module of division with a floating point appropriate to the standard IEEE-754, executed by using the behavioral description of algorithm by language VHDL is offered. The check of functioning of the module of division by a method of modeling in system ModelSim Xilinx Edition???MXE ...
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Parallel VHDL simulation

Proceedings Design, Automation and Test in Europe, 2002
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VHDL

1998
Petru Eles, Krzysztof Kuchcinski, Zebo Peng   +2 more
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VHDL

2003
Gerhard H. Schildt, Alexander Redlein, Daniela Kahn   +2 more
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