Results 211 to 220 of about 39,832 (274)

OO-VHDL. Object-oriented extensions to VHDL

Computer, 1995
Object-oriented extensions to hardware description languages let engineers model systems at a higher level of abstraction, thus helping them manage design complexity and maximize component reuse. OO-VHDL, the object-oriented extension of VHDL that we describe in this article, supports the VHDL computation model and the reactive computation model within
S. Swamy, A. Molin, B. Covnot
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2020
/ , VHDL. VHDL, ,
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VHDL Motivation

IEEE Design & Test of Computers, 1986
The goals of the very high speed integrated circuit (or VHSIC) program are to reduce IC design time and effectively insert VHSIC technology into military systems. These goals, indicating the need for a standard means of communication to stream-line advanced digital design and documentation, motivated the development of a hardware description language ...
Allen Dewey, Anthony Gadient
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2010
, VHDL
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2019
This diploma thesis deals with the implementation of a part of a network protocol at the Datalink layer, which is not executed by any software but by the hardware itself. The code is written in one of the most well-known hardware description languages, VHDL. Thesis sets as fact the communication over an Ethernet connection via 64bit signals.
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VHDL Critique

IEEE Design & Test of Computers, 1986
The hardware and software communities have reviewed VHDL extensively throughout its conception and development. This follows the 1970s example set during development of the Ada programming language. Analysis of language, like one's preference in clothing, is subjective.
J.D. Nash, L.F. Saunders
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VHDL standards

IEEE Design & Test of Computers, 2001
Provides a brief overview of VHDL-related standards. The IEEE approved the original VHDL standard (IEEE Std 1076) in 1987, then revised and significantly enhanced it in 1993. In 2000, an interim edition added concurrency control features for shared variables. The new features, called protected types, are based on the idea of monitors seen in concurrent
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Synchronous designs in VHDL

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference, 2002
Previously, the authors (Proc. Euro. Design Automat. Conf., pp. 680-681, 1992) defined how the concept of synchronous design can be mapped to VHDL descriptions. Now, they present a set of rules, such that, if respected, the VHDL description is synchronous. They then extend the strict notion of synchronism to circuits that can be resynchronized assuming
A. Debreil, P. Oddo
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???????????????????? ???????????????????? ???????????? ?????? ???????????????????????????? ?????????????????????? VHDL-???????????????? ???????????????? ??????????????????

2017
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Do VHDL ao VHDL-AMS em 1 dia

Portal de Livros da Editora, 2020
Linguagens de descrição de hardware são elementos indispensáveis em qualquer projeto ou pesquisa sobre hardware. E muitas vezes é trabalhoso aprender a gramática de uma nova linguagem, ou mesmo nos esquecemos de certos detalhes. Assim, decidimos produzir esse material para auxiliar os iniciantes, ou mesmo servir como material de consulta para usuários ...
Almeida, Tiago da Silva, de Caravlho, Rafael Lima   +1 more
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