Results 261 to 270 of about 30,698 (299)
A CAT expression vector with virtually no background: pUMSVOCAT.
BioTechniques, 1990 J P, Salier, K, Kurachi
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An integrated simdization framework using virtual vectors
Proceedings of the 19th annual international conference on Supercomputing, 2005 Automatic simdization for multimedia extensions faces several new challenges that are not present in traditional vectorization. Some of the new issues are due to the more restrictive SIMD architectures designed for multimedia extensions. Among them are alignment constraints, lack of memory gather and scatter support, and the short and fixed-length ...
Peng Wu 0001 +3 more
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Weight Vector Arrangement Using Virtual Objective Vectors in Decomposition-based MOEA
2021 IEEE Congress on Evolutionary Computation (CEC), 2021This work proposes an arrangement method of weight vectors using virtual objective vectors supplementing the Pareto front estimation. In decomposition-based evolutionary multi-objective optimization, weight vectors decompose the Pareto front. Appropriate weight vector distribution depends on the Pareto front shape, which is generally unknown before the
Tomoaki Takagi +2 more
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Vector Coprocessor Virtualization for Simultaneous Multithreading
ACM Transactions on Embedded Computing Systems, 2016Vector coprocessors (VPs), commonly being assigned exclusively to a single thread/core, are not often performance and energy efficient due to mismatches with the vector needs of individual applications. We present in this article an easy-to-implement VP virtualization technique that, when applied, enables a multithreaded VP to simultaneously execute ...
Yaojie Lu 0002 +2 more
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Virtual vectors and network traffic analysis
IEEE Network, 2012In a high-speed network, traffic monitoring modules should be compact in size to fit into a fast but small memory (e.g., SRAM). We propose two compact algorithms for network traffic monitoring and analysis, for the purposes of per-flow traffic measurement and long-duration flow detection.
Seon-Ho Shin, MyungKeun Yoon 0001
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Proceedings of the 2nd international conference on Virtual execution environments, 2006
We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardware-specific parameters. We provide both arbitrary-length vectors (for targets that allow vectors of arbitrary length, or where the target length is not known) and fixed-length vectors ...
Robert L. Bocchino Jr., Vikram S. Adve
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We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardware-specific parameters. We provide both arbitrary-length vectors (for targets that allow vectors of arbitrary length, or where the target length is not known) and fixed-length vectors ...
Robert L. Bocchino Jr., Vikram S. Adve
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