Results 121 to 130 of about 425 (179)

An effective simplifying scheme for Viterbi decoder

IEEE Transactions on Communications, 1991
A new reduced-state decoding method is presented. The method constructs state-sets, then classifies, compares, and selects states through certain rules based on a Viterbi algorithm (VA). The decoder complexity is reduced to increasing linearly with constraint-length, as compared to the VA whose complexity increases exponentially with constraint-length.
Chongxi Feng
exaly   +2 more sources

An artificial neural net Viterbi decoder

IEEE Transactions on Communications, 1996
The Viterbi algorithm is a maximum likelihood means for decoding convolutional codes and has thus played an important role in applications ranging from satellite communications to cellular telephony. In the past, Viterbi decoders have usually been implemented using digital circuits.
S B Wicker
exaly   +3 more sources

Memory Management in a Viterbi Decoder

IRE Transactions on Communications Systems, 1981
Management of the memory contents in a Viterbi decoder is a major design problem for both hardware and software realizations. In a naive implementation, every bit in the memory must be changed (read, modified, and rewritten) for each message bit decoded, and, in addition, some double buffering is required.
C Rader
exaly   +2 more sources

Memoryless Viterbi decoder

IEEE Transactions on Circuits and Systems II: Express Briefs, 2005
The problem of survival memory management of a Viterbi decoder (VD) was solved by introducing a novel pointer implementation for the register exchange method, where a pointer is assigned to each row of memory in the survivor memory unit (SMU). The content of the pointer which points to one row of memory is altered to point to another row of memory ...
Dalia A. El-Dib, Mohamed I. Elmasry
openaire   +1 more source

A High-Speed Viterbi Decoder

2008 Fourth International Conference on Natural Computation, 2008
Convolutional codes are widely used in many communication systems due to their excellent error-control performance. High-speed Viterbi decoders for convolutional codes are of great interest in high-speed applications. A high-speed (2, 1, 6) Viterbi decoder is presented in this paper, which is based on parallel Radix-4 architecture and bit-level carry ...
Qing Li   +3 more
openaire   +1 more source

Array Processors for Viterbi Decoder

2005 2nd International Symposium on Wireless Communication Systems, 2005
Wireless receivers are often characterized as portable and battery operated. As such, they are bound by a tight set of constraints such as power consumption, area usage, and throughput speed. Parallel implementation of operations increases the speed of computation without an undue increase in lock frequency.
Appaya Devaraj Devaraj, Nastooh Avessta
openaire   +1 more source

Feedforward Architectures for Parallel Viterbi Decoding

Journal of VLSI signal processing systems for signal, image and video technology, 1991
The Viterbi-Algorithm (VA) is a common application of dynamic programming. The algorithm contains a nonlinear feedback loop (ACS-feedback, ACS: add-compare-select) which is the bottleneck in high data rate implementations. In this paper we show that, asymptotically, the ACS-feedback no longer has to be processed recursively, i.e., there is no feedback.
Gerhard P. Fettweis, Heinrich Meyr
openaire   +1 more source

Truncation Error Probability in Viterbi Decoding

IEEE Transactions on Communications, 1977
An upper bound on the bit error probability due to truncation of the path length in Viterbi decoding is obtained for any given convolutional code. This bound is then used to determine the path length at which the additional error probability due to truncation becomes negligible compared to the maximum likelihood decoding error probability.
Farhad Hemmati, Daniel J. Costello Jr.
openaire   +2 more sources

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