Results 101 to 110 of about 9,664,784 (224)
Research on billion-gate hierarchical physical design clock tree
Dianzi Jishu YingyongThe traditional spreading physical design can no longer meet the needs of VLSI physical design, and hierarchical physical design has become the mainstream method of VLSI design.
Wang Shufen, Li Yingli, Gao Kaifei
doaj +1 more source
The 1991 3rd NASA Symposium on VLSI Design [PDF]
, 1991 Papers from the symposium are presented from the following sessions: (1) featured presentations 1; (2) very large scale integration (VLSI) circuit design; (3) VLSI architecture 1; (4) featured presentations 2; (5) neural networks; (6) VLSI architectures ...
Maki, Gary K.
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Design and analysis of NC-FinFET using Pb(ZryTi1−y)O3 under high ionising radiations
Scientific ReportsTransistor performance degrades in the presence of radiation due to increased interface trap charges. Radiation analysis is used to determine the impact of radiation level up to which the transistor shows its normal behaviour.
Suman Lata Tripathi +4 more
doaj +1 more source
, 2022 Computers have become essential to everyday life as much as electricity, communications and transport. That is evident from the amount of electricity we spend to power our computing systems. According to some reports it is estimated to be ≈ 7% of the total consumption worldwide.
openaire +2 more sources
A Sub-1-V Nanopower MOS-Only Voltage Reference
Journal of Low Power Electronics and ApplicationsA novel low-power MOS-only voltage reference is presented. The Enz–Krummenacher–Vittoz (EKV) model is adopted to provide a new perspective on the operating principle.
Siqi Wang +5 more
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VLSI Design of Trusted Virtual Sensors. [PDF]
Sensors (Basel), 2018 Martínez-Rodríguez MC +3 more
europepmc +1 more source
Study on Single Event Upset and Mitigation Technique in JLTFET-Based 6T SRAM Cell
Journal of Electrical and Computer EngineeringThe effect of single event transient (SET) on 6T SRAM cell employing a 20 nm silicon-based junctionless tunneling field effect transistor (JLTFET) is explored for the first time. JLTFET-based SRAM circuit is designed using the look up table-based Verilog
Aishwarya K, Lakshmi B
doaj +1 more source
Trade-Off Considerations in Designing Efficient VLSI Feasible Interconnection Networks [PDF]
, 1995 It is well known that the hypercube has a rich set of good properties, and consequently it has been recognized an ideal structure for parallel computation.
Bettayeb, Said
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H.264 Decoder Optimization – VLIW DSP Platform
, 2009 [[abstract]]©2007 VLSI-This paper presents several optimization techniques of H.264/AVC decoder implementation on a dual-core VLIW PAC DSP platform. The evaluation results show that a video with D1 resolution can be decoded in real-time.[[department ...
Pou-Hang Ian;Jia-Ming Chen;Hsin-Wen Wei;Jian-Liang Luo;Wei-Kuan Shih
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A recursive design methodology for VLSI: Theory and example
, 1984 A novel VLSI (Very Large Scale Integration) methodology based on the hierarchical design of computational and system blocks is presented. The underlying algorithms used are shown to optimise the area-time complexity (AT2) of the computational units and ...
Allen, CR +3 more
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