Results 81 to 90 of about 13,582,659 (253)
Accurate a priori signal integrity estimation using a multilevel dynamic interconnect model for deep submicron VLSI design. [PDF]
, 2000 A multilevel dynamic interconnect model was derived for accurate a priori signal integrity estimates. Cross-talk and delay estimations over interconnects in deep submicron technology were analyzed systematically using this model.
Pamunuwa, Dinesh B. +2 more
core
k-way Hypergraph Partitioning via n-Level Recursive Bisection
, 2015 We develop a multilevel algorithm for hypergraph partitioning that contracts the vertices one at a time. Using several caching and lazy-evaluation techniques during coarsening and refinement, we reduce the running time by up to two-orders of magnitude ...
Henne, Vitali +5 more
core +1 more source
Advanced Functional Materials, Volume 36, Issue 12, 9 February 2026.Thermal transport in Ru and W thin films is studied using steady‐state thermoreflectance, ultrafast pump–probe spectroscopy, infrared‐visible spectroscopy, and computations. Significant Lorenz number deviations reveal strong phonon contributions, reaching 45% in Ru and 62% in W.
Md. Rafiqul Islam +14 more
wiley +1 more source
On the Method of Harmonic Balance for Lumped‐Element Transformer Models
International Journal of Circuit Theory and Applications, Volume 54, Issue 2, Page 625-637, February 2026.The steady‐state solution of a lumped‐element transformer model with a dry friction‐like hysteresis model depicting the magnetic core is of interest. The harmonic balance method efficiently solves this stiff system. We derive the harmonic balance algorithm, enhance it with performance and convergence improvements, and demonstrate its efficiency by ...
Alexander Sauseng +5 more
wiley +1 more source
Hybrid Model: An Efficient Symmetric Multiprocessor Reference Model
Journal of Electrical and Computer Engineering, 2015 Functional verification has become one of the main bottlenecks in the cost-effective design of embedded systems, particularly for symmetric multiprocessors.
Shupeng Wang +3 more
doaj +1 more source
Design of a Low-Power 1.65 Gbps Data Channel for HDMI Transmitter
, 2015 This paper presents a design of low power data channel for application in High Definition Multimedia Interface (HDMI) Transmitter circuit. The input is 10 bit parallel data and output is serial data at 1.65 Gbps. This circuit uses only a single frequency
Agrawal, Ajay, Gamad, R. S.
core +2 more sources
Nonisolated High Step‐Up DC‐DC Ćuk Converter Based on Coupled Inductors
International Journal of Circuit Theory and Applications, Volume 54, Issue 2, Page 874-887, February 2026.A nonisolated high step‐up DC‐DC Ćuk converter based on coupled inductors and voltage multiplier cell (VMCs) is proposed and thoroughly assessed. ABSTRACT This work presents a nonisolated high step‐up DC‐DC Ćuk converter, specifically designed for nanogrid applications.
Manuel de Oliveira Vasconcelos Júnior +7 more
wiley +1 more source
Bandgap voltage reference design with enhanced tolerance of process variations(增强工艺偏差容忍度的带隙基准电压源设计)
Zhejiang Daxue xuebao. Lixue ban, 2016 随着CMOS工艺特征尺寸的减小，带隙基准电压源在制造过程中因器件失配和工艺波动易导致实际输出电压和目标值发生偏离，降低芯片成品率.为此提出将Pelgrom失配模型引入电路设计中，分别从器件参数、电路结构、版图布局三方面对亚微米级的电路进行工艺偏差优化.基于华润上华(CSMC)0. 5 µm工艺以及Hspice软件仿真，显示基准源输出电压为1.232 54 V，偏差小于5 mV.流片测试结果表明，应用此设计的三通道LED驱动控制芯片成品率达到96.8%，输出电流达到(18±0.5)mA的芯片占99.
YUMiao(俞淼) +3 more
doaj +1 more source
A formal verification method: model checking(一种形式化验证方法：模型检验)
Zhejiang Daxue xuebao. Lixue ban, 2006 模型检验作为一种形式化验证方法，近年来在各种硬件、软件设计中得到了广泛应用.文中首先介绍了描述系统行为的Kripke结构和描述系统性质的CTL逻辑，然后介绍了模型检验中常用的两种算法：标记算法和基于固定点的算法，最后介绍了为避免内存爆炸而引入的符号模型检验技术.
YANGJun(杨军) +3 more
doaj +1 more source
A procedural method for the efficient implementation of full-custom VLSI designs [PDF]
An imbedded language system for the layout of very large scale integration (VLSI) circuits is examined. It is shown that through the judicious use of this system, a large variety of circuits can be designed with circuit density and performance comparable
Belk, P., Hickey, N.
core +1 more source