Results 171 to 180 of about 287,549 (207)

Flow Control Mechanism for Wireless Network-on-Chip

2013 10th International Conference on Information Technology: New Generations, 2013
Network on chip (NoC) provides a network-based interconnect infrastructure that facilitates the communications among a slew of function cores in a modern System-on-chip (SoC) design. Apart from topology, switching technique and routing strategy adopted in an NoC, flow control scheme that regulates the packet injection rates is another determining ...
Ling Wang 0004, Zhen Wang, Yingtao Jiang
openaire   +1 more source

HiWA: A hierarchical Wireless Network-on-Chip architecture

2014 International Conference on High Performance Computing & Simulation (HPCS), 2014
Due to high latency and high power consumption in long hops between operational cores of NoCs, the performance of such architectures has been limited. In order to fill the gap between computing requirements and efficient communications, a new technology called Wireless Network-on-Chip (WNoC) has been emerged.
Amin Rezaei 0001, Farshad Safaei, Masoud Daneshtalab, Hannu Tenhunen   +3 more
openaire   +1 more source

A novel hierarchical architecture for Wireless Network-on-Chip

Journal of Parallel and Distributed Computing, 2018
Abstract In the architecture of Networks-on-Chip (NoCs), wired structure and multi-hop communications can lead to high power consumption and latency. Wireless NoC (WiNoC) architecture is a new alternative to solve these challenges. In this architecture, long-range wireless links are used instead of multi-hop wired paths.
Bahareh Bahrami, Mohammad Ali Jabraeil Jamali, Shahram Saeidi   +2 more
openaire   +1 more source

Antennas and Channel Characteristics for Wireless Networks on Chips

Wireless Personal Communications, 2017
We review the current state of the art on antennas for use in wireless networks on chips (WiNoCs) and also provide results on wireless channel characteristics in the WiNoC setting—the latter are largely absent from the literature. We first describe the motivation for constructing these miniature networks, aimed at improving efficiency of future multi ...
William Rayess, David W. Matolak, Savas Kaya, Avinash Karanth Kodi   +3 more
openaire   +1 more source

Energy Efficient Transceiver in Wireless Network on Chip Architectures

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016
The emergent wireless Network-on-Chip (WiNoC) design paradigm has been proposed as a viable solution for addressing the scalability issues affecting the on-chip communication system in future manycores architectures. Within this scenario, the energy contribution of the buffers (both of the routers and radio-hubs) and the transceivers of the radio-hubs,
CATANIA, Vincenzo, Mineo A., MONTELEONE, SALVATORE, PALESI, MAURIZIO, PATTI, DAVIDE   +4 more
openaire   +3 more sources

Hybrid wireless Network on Chip

Proceedings of the 2nd International Workshop on Network on Chip Architectures, 2009
The performance benefits of conventional Network-on-Chip (NoC) architectures are limited by the high latency and energy dissipation in long distance multihop communication between embedded cores. This limitation of conventional NoC architectures can be addressed by introducing long-range, high bandwidth and low power wireless links between the distant ...
Partha Pratim Pande, Amlan Ganguly, Kevin Chang 0002, Christof Teuscher   +3 more
openaire   +1 more source

A Novel Wireless Network-on-Chip Architecture for Multicore Systems

2021 26th International Computer Conference, Computer Society of Iran (CSICC), 2021
Using Wireless Network-on-Chip (WiNOC) for designing the multicore System-on-Chips can significantly decrease the latency and power dissipation of the network. This improvement is achieved by replacing the multi-hop paths between far apart cores with a wireless single-hop link.
Esmaeel Tahanian, Mohsen Rezvani, Mansoor Fateh   +2 more
openaire   +1 more source

An Exploration on Quantity and Layout of Wireless Nodes for Hybrid Wireless Network-on-Chip

2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS), 2014
As the scaling of integration, massive remote communication has become the main bottleneck of system performance for network-on-chip (NoC). Most packets have to travel long distances from source to destination, leading to long latency and severe contention. Hybrid Wireless NoC(HWiNoC) has emerged as a popular method to handle remote transmission in NoC,
Mingmin Yuan, Weiwei Fu, Tianzhou Chen, Minghui Wu 0001   +3 more
openaire   +1 more source

Design and Implementation of Routing Scheme for Wireless Network-on-Chip

2007 IEEE International Symposium on Circuits and Systems, 2007
Modern embedded SoC design uses a rapidly increasing number of processing units for ubiquitous computing. When moving towards a billion-transistor era, ever increasing complexity, density and heterogeneity of embedded components exacerbate on-chip communication, which serves as the fabric to integrate these components and provide a communication ...
Yi Wang 0007, Dan Zhao 0001
openaire   +1 more source

A Statistical Model for Hybrid Wireless Network on Chip

2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID), 2016
A scalable and easy to design solution for the continuing demand of high performance chip multiprocessors paved the way for Hybrid Wireless Network on Chip (WiNoC) architectures which comprises of both wired and wireless channel interconnects for communication.
openaire   +1 more source