Results 211 to 220 of about 7,349 (255)
Some of the next articles are maybe not open access.
Architecting a Secure Wireless Network-on-Chip
2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2018Peer ...
Brian Lebiednik +3 more
openaire +1 more source
Secure communications in wireless network-on-chips
Proceedings of the 2nd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, 2017Wireless on-chip communication is an emerging technology that is currently being adopted in order to reduce latency and energy consumption of network transactions in many-core systems. The reason is that the multi-hop nature of conventional electrical network-on-chip has lead to the point of diminishing returns, which even aggravates as the number of ...
Fernando Pereñíguez-Garcia +1 more
openaire +1 more source
Channel modeling for wireless networks-on-chips
IEEE Communications Magazine, 2013Designing and implementing wireless networks on chips (WiNoCs) presents numerous engineering challenges, in the areas of computer architecture, multiple access, wireless propagation, physical layer communications processing, and device design and fabrication.
Matolak, David W +2 more
openaire +2 more sources
A Wireless Network-on-Chip Design for Multicore Platforms
2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing, 2011Aggressive scaling of transistors allows integration of hundreds of processors on a chip. However, on-chip interconnects carrying signals between different blocks will be the bottleneck for system performance and reliability. To tackle this problem, we developed an on-chip communication infrastructure based on a network-on-chip architecture and ...
Chifeng Wang +2 more
openaire +1 more source
Temperature-aware wireless network-on-chip architecture
International Green Computing Conference, 2014Long-range wireless shortcuts in Network-on-Chip (NoC) architectures are shown to significantly improve energy-efficiency in on-chip data transfer. However, over-utilization of the wireless shortcuts and non-uniform traffic patterns may result in thermal hotpots in the NoC links or switches.
Md Shahriar Shamim +4 more
openaire +1 more source
2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP), 2013
On-chip wireless interconnects are being investigated for applicability on network-on-chip systems of contemporary Multiprocessor Systems-on-chip (MPSoCs). Targeting both 2D and 3D semiconductor technologies, wireless interconnects are established with multiple antennas on the same die or couplers on the layers of a 3D IC package.
openaire +1 more source
On-chip wireless interconnects are being investigated for applicability on network-on-chip systems of contemporary Multiprocessor Systems-on-chip (MPSoCs). Targeting both 2D and 3D semiconductor technologies, wireless interconnects are established with multiple antennas on the same die or couplers on the layers of a 3D IC package.
openaire +1 more source
Performance evaluation of wireless networks on chip architectures
2009 10th International Symposium on Quality of Electronic Design, 2009The performance benefits of conventional Network-on-Chip (NoC) architectures are limited by the high latency and energy dissipation in long distance multihop communication between embedded cores. To alleviate these problems, wireless on-chip networks are envisioned.
Amlan Ganguly +4 more
openaire +1 more source
Flow Control Mechanism for Wireless Network-on-Chip
2013 10th International Conference on Information Technology: New Generations, 2013Network on chip (NoC) provides a network-based interconnect infrastructure that facilitates the communications among a slew of function cores in a modern System-on-chip (SoC) design. Apart from topology, switching technique and routing strategy adopted in an NoC, flow control scheme that regulates the packet injection rates is another determining ...
Ling Wang 0004, Zhen Wang, Yingtao Jiang
openaire +1 more source
HiWA: A hierarchical Wireless Network-on-Chip architecture
2014 International Conference on High Performance Computing & Simulation (HPCS), 2014Due to high latency and high power consumption in long hops between operational cores of NoCs, the performance of such architectures has been limited. In order to fill the gap between computing requirements and efficient communications, a new technology called Wireless Network-on-Chip (WNoC) has been emerged.
Amin Rezaei 0001 +3 more
openaire +1 more source
A novel hierarchical architecture for Wireless Network-on-Chip
Journal of Parallel and Distributed Computing, 2018Abstract In the architecture of Networks-on-Chip (NoCs), wired structure and multi-hop communications can lead to high power consumption and latency. Wireless NoC (WiNoC) architecture is a new alternative to solve these challenges. In this architecture, long-range wireless links are used instead of multi-hop wired paths.
Bahareh Bahrami +2 more
openaire +1 more source