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High-Speed and Energy-Efficient Carry Look-Ahead Adder
Journal of Low Power Electronics and Applications, 2022 The carry look-ahead adder (CLA) is well known among the family of high-speed adders. However, a conventional CLA is not faster than other high-speed adders such as a conditional sum adder (CSA), a carry-select adder (CSLA), and the Kogge–Stone adder ...
Padmanabhan Balasubramanian +1 more
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SN Applied Sciences, 2021 Article Highlights Hybrid full adders offer better performance than single logic full adders Many existing full adder cells are not scalable Conventional Mirror CMOS full adder offers better performance than many recent full adders in wide adder ...
Mehedi Hasan +5 more
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A Novel Approximate Adder Design Using Error Reduced Carry Prediction and Constant Truncation
IEEE Access, 2021 This paper proposes a novel approximate adder that exploits an error-reduced carry prediction and constant truncation with error reduction schemes. The proposed adder design techniques significantly improve overall computation accuracy while providing ...
Jungwon Lee +3 more
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Approximate adder design with simplified lower-part approximation
IEICE Electronics Express, 2020 This letter presents a novel approximate adder that reduces energy and power consumption by leveraging a simplified lower-part approximation. The proposed scheme reduces hardware costs while providing an acceptable accuracy performance.
Yongtae Kim, Hyoju Seo, Jungwon Lee
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An efficient method of modulo adder design for Digital Signal Processing applications [PDF]
MethodsXModulo adder is a widely used arithmetic component in many Digital Signal Processing (DSP) applications such as Finite Impulse Response (FIR), Infinite Impulse Response (IIR) filters, digital signal processors, image processing modules, discrete cosine ...
Subodh Kumar Singhal +4 more
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Low voltage high performance hybrid full adder
Engineering Science and Technology, an International Journal, 2016 This paper presents a low voltage and high performance 1-bit full adder designed with an efficient internal logic structure that leads to have a reduced Power Delay Product (PDP).
Pankaj Kumar, Rajender Kumar Sharma
exaly +3 more sources
Recurrent Neural Network from Adder's Perspective: Carry-lookahead RNN [PDF]
Neural Networks, 2021 The recurrent network architecture is a widely used model in sequence modeling, but its serial dependency hinders the computation parallelization, which makes the operation inefficient.
Haowei Jiang +4 more
semanticscholar +1 more source
Novel reversible CLA, optimized RCA and parallel adder/subtractor circuits [PDF]
Serbian Journal of Electrical Engineering, 2020 This paper proposes reversible circuit designs of the three most commonly used adders: carry look-ahead adder (CLA adder), ripple carry adder (RCA adder), and parallel adder/subtractor.
Gharajeh Mohammad Samadi +1 more
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Design and simulation of Penternary adder based on GNRFET [PDF]
مجله مدل سازی در مهندسی, 2021 In this paper, the design of penternary circuits based on graphene nanoribbon FET (GNRFET) is presented. The employed logic of the penternary corresponds to the Galois logic.
Mahdieh Nayeri, Maryam Nayeri
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FPGA Implementation of Threshold-Type Binary Memristor and Its Application in Logic Circuit Design
Micromachines, 2021 In this paper, a memristor model based on FPGA (field programmable gate array) is proposed, by using which the circuit of AND gate and OR gate composed of memristors is built. Combined with the original NOT gate in FPGA, the NAND gate, NOR gate, XOR gate
Liu Yang +3 more
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