Results 21 to 30 of about 34,728 (307)
Sakarya University Journal of Computer and Information Sciences, 2023 Encryption algorithms work with very large key values to provide higher security. In order to process high-capacity data in real-time, we need advanced hardware structures.
Kenan Baysal, Deniz Taşkın
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IEEE Access, 2021 This article presents a novel approximate adder that is design-optimized and has optimized error metrics. Optimization in design translates into optimization of the design parameters such as delay, power, and area/resources, and optimization of the error
P. Balasubramanian +3 more
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Hardware-Efficient Delta Sigma-Based Digital Signal Processing Circuits for the Internet-of-Things
Journal of Low Power Electronics and Applications, 2015 This paper presents hardware-efficient Delta Sigma linear processing circuits for the next generation low-power VLSI devices in the Internet-of-things (IoT).We first propose the P-N (positive-negative) pair method to manipulate both the analog value and ...
Yifei Liu, Paul M. Furth, Wei Tang
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Mycobacteria Modify Their Cell Size Control under Sub-Optimal Carbon Sources
Frontiers in Cell and Developmental Biology, 2017 The decision to divide is the most important one that any cell must make. Recent single cell studies suggest that most bacteria follow an “adder” model of cell size control, incorporating a fixed amount of cell wall material before dividing. Mycobacteria,
Miles Priestman +3 more
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Comparative Study of DDS with Different Types of Phase Accumulators
Inventions, 2019 The paper deals with the problems of delayed transfer signals in the direct digital synthesizer (DDS) phase accumulator adders. Transfer delay is one of the factors that affect the maximum output frequency of the DDS synthesizer. The main types of adders
Oleksiy Polikarovskykh +3 more
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Journal of Veterinary Internal Medicine, 2020 Background Envenomation by the European adder (Vipera berus) is common in dogs in Europe. Cardiac arrhythmias occur but clinical studies of envenomated dogs are limited.
Hannah J. Harjen +6 more
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A Monotonic Early Output Asynchronous Full Adder
Technologies, 2023 This article introduces a novel asynchronous full adder that operates in an input–output mode (IOM), displaying both monotonicity and an early output characteristic.
Padmanabhan Balasubramanian +1 more
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Ternary Łukasiewicz logic using memristive devices
Neuromorphic Computing and Engineering, 2023 Memristive devices based on the Valence Change Mechanism (VCM) are promising devices for storage class memory, neuromorphic computing and logic-in-memory (LIM) applications.
Christopher Bengel +7 more
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People and Nature, 2023 Adder ( Vipera berus ) populations are experiencing declines in many countries, including the United Kingdom. Perceptions of adders and other venomous snakes are generally negative, making conservation of these species a challenge, and persecution ...
Sam J. Kelly +5 more
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Low-Power, High-Speed Adder Circuit Utilizing Current-Starved Inverters in 22 nm FDSOI
ChipsA low-power, high-speed adder circuit topology based on current-starved inverters is presented to provide a basic arithmetic function for low-power, high-frequency signal processing systems. The adder is designed in 22 nm FDSOI (Fully-Depleted Silicon-on-
Jeff Dix
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