Results 141 to 150 of about 952 (175)

Adiabatic Logic Circuits

2014
This chapter is concerned with adiabatic logic circuits. First, it introduces adiabatic charging which forms the basis of adiabatic circuits. The difference between adiabatic charging and conventional charging of a capacitor is highlighted. As amplification is a fundamental operation performed by electronic circuits to increase the current or voltage ...
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Adiabatic Logic Circuits: A Review

Russian Microelectronics, 2001
The current status of research and development in the field of adiabatic electronic devices for the production of information is reviewed. The adiabatic property means that the power supply regains most of the energy expended on computing. A design philosophy of universal adiabatic logic gates is framed. The gates are categorized according to adiabatic
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An improved pass-gate adiabatic logic

Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558), 2002
Presents an improved pass-gate adiabatic charge-recovery logic (IPGL) which is efficient in power consumption and requires only moderate reversibility overhead. The energy efficiency is achieved by completely eliminating non-adiabatic loss during the charge phase of the clock, and the reversibility overhead is kept low by allowing partial reversibility
L. Varga, F. Kovacs, G. Hosszu
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Reversible logic issues in adiabatic CMOS

Proceedings Workshop on Physics and Computation. PhysComp '94, 2002
Power dissipation in CMOS circuits has become increasingly important for the design of portable, embedded and high-performance computing systems. Our VLSI research group has investigated a novel form of energy-conserving logic suitable for CMOS. Through small chip-building experiments, we have demonstrated the low-power operation of simple logic ...
W.C. Athas, L.J. Svensson
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Future Trend in Adiabatic Logic

2012
Scaling of CMOS devices has a strong impact on transistors and, thus, also on the operation of Adiabatic Logic. The impact of scaling is estimated by means of simulation of industrial and predictive technology models and a trend for scaling down to the 16 nm node is presented.
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Reversible Computing Using Adiabatic Superconductor Logic

2014
The adiabatic quantum-flux-parametron (AQFP), which is adiabatic superconductor logic, is well suitable to realize reversible computing, because of the extremely high energy efficiency. In AQFP logic, dynamic energy dissipation can be significantly reduced by varying potential energy adiabatically during a switching event, which prevents non-adiabatic ...
Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa   +2 more
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Power-Clock Gating in Adiabatic Logic Circuits

2005
For static CMOS Clock-Gating is a well-known method to decrease dynamic losses. In order to reduce the static power consumption caused by leakage currents, Power-Gating has been introduced. This paper presents for the first time Clock-Gating and Power-Gating in Adiabatic Logic. As the oscillator signal is both the power and the clock in Adiabatic Logic,
Philip Teichmann, Jürgen Fischer, Stephan Henzler, Ettore Amirante, Doris Schmitt-Landsiedel   +4 more
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Quantum logic gates by adiabatic passage

Journal de Physique IV (Proceedings), 2006
We present adiabatic passage techniques for the realisation of one and two-qubit quantum gates. These methods use evolution along dark-states of the system, avoiding decoherence effects such as spontaneous emission. The advantage of these methods is their robustness: they are insensitive to the fluctuations of the parameters and to partial knowledge of
Lacour, X., Sangouard, Nicolas, Guerin, Stephane, Jauslin, Hans-Rudolf   +3 more
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Arithmetic Structures in Adiabatic Logic

2012
Arithmetic structures are a major building block for digital signal processing tasks. Inherent pipelining in Adiabatic Logic can be advantageously used to implement compact and energy efficient arithmetic units. Ripple-carry-adder and different parallel-prefix adders are rated with respect to energy and area consumption. Efficient arithmetic structures
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Comparative analysis of adiabatic logic styles

8th International Multitopic Conference, 2004. Proceedings of INMIC 2004., 2005
Over the past decade, different adiabatic logic styles for low-power applications have been published. This paper compares and analyzes the performance and energy dissipation of various adiabatic logic styles in a uniform test environment. The test benches are laid out and a test chip has been fabricated in a standard 0.18 /spl mu/m CMOS technology ...
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