Results 11 to 20 of about 9,919 (266)
Reducing specific on-resistance for a trench SOI LDMOS with L-shaped P/N pillars
Results in Physics, 2020 To reduce specific on-resistance (Ron,sp) of power devices, a novel SOI (silicon-on-insulator) trench gate LDMOS with heavily doping L-shaped P/N pillars and vertical dual-trench-gates is proposed in this paper, and its physical mechanism and electrical ...
Jingwei Guo +6 more
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An expandable 36‐channel neural recording ASIC with modular digital pixel design technique
Electronics Letters, 2023 This paper presents the design and implementation of an expandable neural recording ASIC for multiple‐channel neural recording applications. The ASIC consists of 36 modular digital pixels (MDPs) and a global digital controller (GDC) circuit. Each MDP has
Quan Wang +8 more
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Electronics Letters, 1994 A new analogue median circuit with a very sharp DC transfer characteristic is described. The configuration is based on a multiple-input current comparator and can be generalised to other rank extractors. A prototype has been fabricated in a 2 µm CMOS technology, and experimental results are presented.
I.E. Opris, G.T.A. Kovacs
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Sensors, 2014 It is difficult for structural over-complete dictionaries such as the Gabor function and discriminative over-complete dictionary, which are learned offline and classified manually, to represent natural images with the goal of ideal sparseness and to ...
Zheng-Zhou Li +7 more
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Advances in Condensed Matter Physics, 2015 In order to achieve a high breakdown voltage (BV) for the SOI (Silicon-On-Insulator) power device in high voltage ICs, a novel high voltage n-channel lateral double-diffused MOS (LDMOS) with a lateral variable interface doping profile (LVID) placed at ...
Jingjing Jin +7 more
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Electronics Letters, 2023 In this letter, a new rail‐to‐rail two‐stage regenerative comparator for low supply voltage applications is presented. A rail‐to‐rail operation is achieved by utilizing an inverse inverter pre‐amplifier.
Hadi Pahlavanzadeh +2 more
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Asynchronous SAR ADC with self‐timed track‐and‐hold
Electronics Letters, 2023 This paper presents an asynchronous SAR ADC featuring a self‐timed track‐and‐hold (STH) architecture. The design aims to address the common timing issue of divider‐based clock generation, where the fixed‐time track‐and‐hold (FTH) period often results in ...
Sunghyun Bae +4 more
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Results in Physics, 2020 Double silicon drift layers are used to reduce the specific on-resistance (Ron,sp) for a trench-gate-integrated lateral double-diffused MOSFET (DDL TG LDMOS) based on SOI technology in this paper.
Yuan Wang +7 more
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Electronics Letters, 2023 A novel small‐signal detection method that focuses on detection rather than measurement is proposed. It is particularly useful when a sensor is implanted within a living body. Unlike conventional methods, the proposed method detects signals by converting
Soichiro Yamakawa +3 more
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Programmable mixed-signal circuits
SN Applied Sciences, 2023 A novel concept for programmable mixed-signal circuits is presented based on programmable transmission gates. For implementation, memristively switching devices are suggested as the most promising candidates for realization of fast and small-footprint ...
S. Tappertzhofen
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