Results 21 to 30 of about 665,124 (279)
It is difficult for structural over-complete dictionaries such as the Gabor function and discriminative over-complete dictionary, which are learned offline and classified manually, to represent natural images with the goal of ideal sparseness and to ...
Zheng-Zhou Li +7 more
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In order to achieve a high breakdown voltage (BV) for the SOI (Silicon-On-Insulator) power device in high voltage ICs, a novel high voltage n-channel lateral double-diffused MOS (LDMOS) with a lateral variable interface doping profile (LVID) placed at ...
Jingjing Jin +7 more
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In this letter, a new rail‐to‐rail two‐stage regenerative comparator for low supply voltage applications is presented. A rail‐to‐rail operation is achieved by utilizing an inverse inverter pre‐amplifier.
Hadi Pahlavanzadeh +2 more
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Asynchronous SAR ADC with self‐timed track‐and‐hold
This paper presents an asynchronous SAR ADC featuring a self‐timed track‐and‐hold (STH) architecture. The design aims to address the common timing issue of divider‐based clock generation, where the fixed‐time track‐and‐hold (FTH) period often results in ...
Sunghyun Bae +4 more
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A design-for-test structure for optimising analogue and mixed signal IC test [PDF]
A new Design-for-Test (DfT) structure based on a configurable operational amplifier, referred to as a “swap amp” is presented that allows access to embedded analogue blocks.
Dorey, A. P. +7 more
core +5 more sources
Double silicon drift layers are used to reduce the specific on-resistance (Ron,sp) for a trench-gate-integrated lateral double-diffused MOSFET (DDL TG LDMOS) based on SOI technology in this paper.
Yuan Wang +7 more
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A novel small‐signal detection method that focuses on detection rather than measurement is proposed. It is particularly useful when a sensor is implanted within a living body. Unlike conventional methods, the proposed method detects signals by converting
Soichiro Yamakawa +3 more
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Low‐leakage zero‐static power consumption analogue CMOS switch
The architecture of a low‐leakage switch in complementary metal‐oxide‐semiconductor (CMOS) technology developed to implement long‐term analogue memories for low‐power applications is presented.
Giuseppe Sciortino +4 more
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The application of neuMOS transistors to enhanced Built-in Self-Test (BIST) and product quality [PDF]
The neuMOS transistor is a comparatively new device developed in 1991 at Tohoku University, Japan, which is currently showing great promise in the direction of enhanced circuit functionality, particularly in Neural Network applications.
Richardson, Andrew, Nicholson, Richard
core +4 more sources
Dual‐channel pre‐regulator structure for the bandgaps in high step‐down DC‐DC converters
High step‐down DC‐DC converters require a robust and low power pre‐regulated supply for bandgap reference. This paper proposes a structure that comprised of two current paths to achieve energy efficient pre‐regulation under high and low input voltage ...
Jiarui Ren, Yue Zhao, Zhiming Xiao
doaj +1 more source

