Results 281 to 290 of about 51,918 (342)

Sizing Analogue Integrated Circuits by Integer Encoding and NSGA-II

IETE Technical Review, 2017
ABSTRACTTraditional sizing approaches for analogue integrated circuits (ICs) consisting of metal-oxide-semiconductor field-effect transistors manipulate real values for the widths (W) and lengths (L), thus requiring a post-processing step to round them to multiples of lambda, i.e. the IC fabrication technology.
A. C. Sanabria-Borbón, E. Tlelo-Cuautle
openaire   +1 more source

Future of Analogue Integrated Circuit Design

1993
Analogue integrated circuit design has played an important role in the development of integrated circuit technology. As the level of integration increased in integrated circuit technology, digital circuit implementation became more desirable than analogue circuit implementation because of its robustness and simplicity of design. However, an all-digital
openaire   +1 more source

Electrical characterization of analogue and RF integrated circuits by thermal measurements

Microelectronics Journal, 2007
This paper presents a novel technique for measuring the electrical characteristics of analogue circuits, based on measuring the temperature at the silicon surface close to the circuit under test. As a detailed example, the paper analyses how the gain of an amplifier can be observed through temperature measurements.
D. Mateo, J. Altet, E. Aldrete-Vidrio
openaire   +1 more source

A design for testability approach for nano-CMOS analogue integrated circuits

International Journal of Electronics, 2013
Dependability requirements must be considered from the beginning when designing safety-critical systems. Therefore, testing should even be considered earlier, intertwined with the design process. The process of designing for better testability is called design for testability (DfT).
Mouna Karmani, Chiraz Khedhiri, Belgacem Hamdi, Ka Lok Man, Rached Tourki   +4 more
openaire   +1 more source

Parametric yield enhancement of analogue integrated circuits: a new approach

1991 IEEE International Symposium on Circuits and Systems (ISCAS), 1991
Two algorithms for the parametric yield enhancement of analog ICs have been developed. Those parameters which are under the designer's control are geometric in nature and are collectively represented by a point in geometric space (G-space) whose axes are typically device widths. The aim of the yield enhancement algorithm is to move the point in G-space
M. Singha, R. Spence
openaire   +1 more source

Experimental validation of electrothermal simulations using SETIPIC for analogue integrated circuits

Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics, 2002
This paper presents the validation of SETIPIC-an electrothermal simulator for power integrated circuits. SETIPIC works by alternation of electrical simulations, using a SPICE-like simulator and thermal simulations using PICMOST-a three-dimensional thermal simulator we wrote to obtain the thermal distribution on the layout surface in a transient or ...
J. Ecrabey, L. Hebrard, C. Klingeihofer, F. Gaffiot, G. Jacquemod, J. Berger-Toussan, M. Le Helley   +6 more
openaire   +1 more source

Dynamical memristors for higher-complexity neuromorphic computing

Nature Reviews Materials, 2022
Suhas Kumar, Xinxin Wang, John Paul Strachan   +2 more
exaly  

An intelligent design system for analogue integrated circuit

Proceedings of the European Design Automation Conference, 1990., EDAC., 2002
G. Gielen, K. Swings, W. Sansen
openaire   +1 more source

Analogue integrated circuit technology

2003
George Clayton, Steve Winder
openaire   +1 more source

Automatic fault extraction and simulation of layout realistic faults for integrated analogue circuits

, 1995
Christian Sebeke, J.P. Teixeira, M.J. Ohletz   +2 more
openalex   +1 more source