Results 11 to 20 of about 428 (244)
Approximate Adder with Reduced Error [PDF]
2019 IEEE 31st International Conference on Microelectronics (MIEL), 2019 A new approximate adder is proposed, which is suitable for FPGA-and ASIC-based implementations. Here, we consider an Artix-7 FPGA for the implementations using Vivado 2018.3. For 32-bit addition, the proposed approximate adder with an 8-bit least significant inaccurate sub-adder reports an improvement in the maximum frequency by 7.7% compared to the ...
Balasubramanian, Padmanabhan +2 more
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IEEE Access, 2021 This article presents a novel approximate adder that is design-optimized and has optimized error metrics. Optimization in design translates into optimization of the design parameters such as delay, power, and area/resources, and optimization of the error
Padmanabhan Balasubramanian +3 more
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Design of Low-Power Approximate Logarithmic Multipliers with Improved Accuracy [PDF]
Journal of Applied Research in Electrical Engineering, 2023 Approximate computing is considered a promising way to design high-performance and low-power arithmetic units recently. This paper proposes an energy-efficient logarithmic multiplier for error-tolerant applications.
Mojtaba Arab Nezhad, Ali Mahani
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Hardware Efficient Approximate Adder Design [PDF]
TENCON 2018 - 2018 IEEE Region 10 Conference, 2018 This paper presents a new approximate adder architecture which when implemented on an FPGA consumes fewer logic resources compared to accurate adders of similar size and can achieve higher or comparable operating frequencies. For 32-bit addition, our approximate adder achieves a 25% reduction in the number of LUTs utilized compared to the accurate ...
Balasubramanian, Padmanabhan +1 more
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IET Computers & Digital Techniques, 2021 In recent years, approximate circuit design targeting the error‐tolerant applications has gained significance. In this study, the authors propose a metric that ranks a stand‐alone approximate adder in terms of power savings obtained for a given mean ...
Celia Dharmaraj +2 more
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Memories - Materials, Devices, Circuits and Systems, 2022 IoT uses wireless sensor networks (WSN) to deploy many sensors to track environmental and physical parameters. The WSN measurements are frequently contaminated and altered by noise.
Charles Rajesh Kumar J. +2 more
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Results in Engineering, 2023 Low cost, low form factor and highly energy efficient VLSI design is the key for the success of internet of things (IoT) paradigm. Approximate computing is one of the major techniques used to achieve high performance and energy efficiency in error ...
Rajasekhar Turaka +7 more
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Gate-Level Static Approximate Adders
CoRR, 2021 15 ...
P. Balasubramanian 0001 +2 more
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A Comparative Review and Evaluation of Approximate Adders [PDF]
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 2015 As an important arithmetic module, the adder plays a key role in determining the speed and power consumption of a digital signal processing (DSP) system. The demands of high speed and power efficiency as well as the fault tolerance nature of some applications have promoted the development of approximate adders.
Honglan Jiang +2 more
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Computers, 2022 Approximate computing is a promising approach to the design of area–power-performance-efficient circuits for computation error-tolerant applications such as image processing and machine learning.
Koyu Ohata +3 more
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