Results 21 to 30 of about 92,024 (251)

ASIC Clouds: Specializing the Datacenter

2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), 2016
GPU and FPGA-based clouds have already demonstrated the promise of accelerating computing-intensive workloads with greatly improved power and performance. In this paper, we examine the design of ASIC Clouds, which are purpose-built datacenters comprised of large arrays of ASIC accelerators, whose purpose is to optimize the total cost of ...
Magaki, Ikuo, Khazraee, Moein, Gutierrez, Luis Vega, Taylor, Michael Bedford   +3 more
openaire   +2 more sources

The Isolated Thumb Domain of Acid‐Sensing Ion Channels Forms a Minimal Folding Unit Enabling Ligand Binding Studies

Angewandte Chemie, EarlyView.
An independently folded thumb domain from acid‐sensing ion channels (ASICs) preserves ligand‐binding and proton‐sensing properties. NMR‐based interaction and pKa analyses uncover how endogenous and exogenous peptides modulate ASICs, providing a simplified model for rational drug discovery targeting proton‐gated ion channels.
Biswa P. Mishra, Ben Cristofori‐Armstrong, Elena Budusan, Mimi Golder, Neville J. Butcher, Junyu Liu, Theo Crawford, Yanni K.‐Y. Chin, Anneka Pereira Schmidt, Xinying Jia, Taylor B. Smallwood, Richard J. Clark, Jan P. Wurm, Lachlan D. Rash, Mehdi Mobli   +14 more
wiley   +2 more sources

An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations

Nature Communications, 2021
In standard computing architectures, memory and logic circuits are separated, a feature that slows matrix operations vital to deep learning algorithms. Here, the authors present an alternate in-memory architecture and demonstrate a feasible approach for ...
Yin Wang, Hongwei Tang, Yufeng Xie, Xinyu Chen, Shunli Ma, Zhengzong Sun, Qingqing Sun, Lin Chen, Hao Zhu, Jing Wan, Zihan Xu, David Wei Zhang, Peng Zhou, Wenzhong Bao   +13 more
doaj   +1 more source

A Prototype Scalable Readout System for Micro-pattern Gas Detectors

, 2016
A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors. The system mainly consists of three kinds of modules: the ASIC card, the Adapter card and the Front-End Card (FEC).
An, Qi, Feng, Chang-Qing, Li, Cheng, Liu, Shu-Bin, Tian, Jing, Zheng, Qi-Bin   +5 more
core   +1 more source

Alternative glues for the production of ATLAS silicon strip modules for the Phase-II upgrade of the ATLAS Inner Detector [PDF]

, 2015
The Phase-II upgrade of the ATLAS detector for the High Luminosity Large Hadron Collider (HL-LHC) includes the replacement of the current Inner Detector with an all-silicon tracker consisting of pixel and strip detectors.
Bloch, Ingo, Edwards, Sam, Friedrich, Conrad, Gregor, Ingrid-Maria, Jones, Tim, Lacker, Heiko, Poley, Luise, Pyatt, Simon, Rehnisch, Laura, Sperlich, Dennis, Wilson, John   +10 more
core   +2 more sources

Performance test of front-end ASIC chip CSNS_VASD developed for China Spallation Neutron Source

He jishu
BackgroundThe neutron scintillator detector is one of the main detectors for China Spallation Neutron Source (CSNS). High detection efficiency is the design goal of the second-generation neutron scintillator detector, which is in process of development ...
YANG Hao, LU Shuxiang, LI Huaishen, CHEN Shaojia, TANG Bin, WANG Xiuku, ZENG Lixin, YU Li, WAN Zhiyong, LIU Huiyin, SUN Zhijia   +10 more
doaj   +1 more source

An Ingenious Design of a High Performance-Low Complexity Image Compressor for Wireless Capsule Endoscopy

Sensors, 2020
Wireless Capsule Endoscopy is a state-of-the-art technology for medical diagnoses of gastrointestinal diseases. The amount of data produced by an endoscopic capsule camera is huge.
Ioannis Intzes, Hongying Meng, John Cosmas   +2 more
doaj   +1 more source

Algorithms for extracting subsystems from a multilevel representation of a system of Boolean functions for joint minimization

Informatika
Objectives. The purpose of experimental research is to determine the effectiveness of new algorithms for extracting the so-called connected subsystems from formula descriptions of the original system of Boolean functions.
P. N. Bibilo, N. A. Kirienko, V. I. Romanov   +2 more
doaj   +1 more source

Efficient programmable power‐of‐two scaler for the three‐moduli set {2

ETRI Journal, 2020
Scaling is an important operation because of the iterative nature of arithmetic processes in digital signal processors (DSPs). In residue number system (RNS)–based DSPs, scaling represents a performance bottleneck based on the complexity of inter‐modulo ...
MohammadReza Taheri, Keivan Navi, Amir Sabbagh Molahosseini   +2 more
doaj   +1 more source

Analog Integrated Circuits Based on Wafer-Level Two-Dimensional MoS₂ Materials With Physical and SPICE Model

IEEE Access, 2020
In this article, accurate physical and SPICE model of wafer-level monolayer molybdenum disulfide (MoS2) device are developed to guide the devices and circuits design, which is the foundation of high-performance analog chip design.
Shunli Ma, Yan Wang, Xinyu Chen, Tianxiang Wu, Xi Wang, Hongwei Tang, Yuting Yao, Hao Yu, Yaochen Sheng, Jingyi Ma, Junyan Ren, Wenzhong Bao   +11 more
doaj   +1 more source