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Progress in Research on Co-Packaged Optics. [PDF]

open access: yesMicromachines (Basel)
Tian W   +6 more
europepmc   +1 more source

Design of Mixed-Mode Analog PID Controller with CFOAs. [PDF]

open access: yesSensors (Basel)
Roongmuanpha N   +3 more
europepmc   +1 more source
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Integrated BiCMOS Control Circuits for High-Performance DC–DC Boost Converter

IEEE Transactions on Power Electronics, 2013
This paper introduces the design of integrated BiCMOS current-sensing circuit and amplifier for high-performance current-mode dc-dc boost converter. By exploiting the advantage presented by the integration of both CMOS and bipolar devices within same technology, the BiCMOS circuits offers high-gain amplifier and accurately sensed inductor current.
Chan-Soo Lee   +4 more
openaire   +3 more sources

An analog BiCMOS integrated circuit for front-end RDS decoder

IEEE Transactions on Consumer Electronics, 1991
An analog integrated front-end circuit for the RDS (Radio-Data-System) digital decoder is described. The core of the circuit is an 8th-order switched-capacitor (SC) bandpass filter at 57 kHz with linear-phase response in a 3 kHz bandwidth. A low-offset comparator provides the squared signal for the digital decoder.
BASCHIROTTO A   +5 more
openaire   +3 more sources

Integrated Circuits in SiGe BiCMOS for Millimeter-Wave and Terahertz Bioanalyzers

2022 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications (IMWS-AMP), 2022
Dietmar Kissinger
openaire   +3 more sources

A 700 Mb/s BiCMOS read channel integrated circuit

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177), 2002
A read channel IC achieves >1.5 dB SNR improvement over a 32/34 rate EPRML read channel at 2.8 user bit density. The 0.18 /spl mu/m BiCMOS chip operates up to 700 Mb/s with 1.8 W read mode power using 3.3 V analog and 1.8 V digital power supplies. The die area is 9.64 mm/sup 2/.
S. Altekar   +24 more
openaire   +1 more source

Issues in the design of analog BiCMOS integrated circuits

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96, 2002
In this paper we will discuss the trade-offs between cost and performance with respect to bipolar devices in analog circuit design. We will show that for most analog designs a low cost BiCMOS process will suffice and provide the designer with significant benefits to justify the added cost. We will show which modifications should be made to a given CMOS
F. Larsen, M. Ismail
openaire   +1 more source

BiCMOS Digital Integrated Circuits

1993
In this chapter, we introduce a variety of digital BiCMOS circuit structures such as the totem-pole BiCMOS gate and the merged MOS/bipolar current mode circuits. This chapter starts with a brief comparison between MOS and bipolar devices in terms of their current drive capabilities. The advantage of using bipolar devices for the totem-pole structure is
Sherif H. K. Embabi   +2 more
openaire   +1 more source

Integrated BiCMOS process and circuit development using SPR

Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium, 2002
An integrated process development environment is described. Geometry information for process simulation is taken automatically from a commercial layout tool, and process step information exists in a high-level language databank. Doping information can be read by a device simulator, permitting SPICE (simulation program with IC emphasis)-like circuit ...
R. Ryter   +4 more
openaire   +1 more source

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