Results 101 to 110 of about 227,711 (205)
Basic Approaches for Reducing Power Consumption in Finite State Machine Circuits—A Review
Methods for reducing power consumption in circuits of finite state machines (FSMs) are discussed in this review. The review outlines the main approaches to solving this problem that have been developed over the last 40 years.
Alexander Barkalov +3 more
doaj +1 more source
Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee +16 more
wiley +1 more source
Enabling concurrent clock and power gating in an industrial design flow
Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way that the clock-gating information can be used to drive the control signal of the
MACII, Alberto +4 more
core
Deterministic clock gating for microprocessor power reduction [PDF]
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs.
T. N. Vijaykumar +5 more
core
Design and analysis of a low-power HMAC hardware architecture
Hash-based message authentication code (HMAC) modules often operate for extended periods in power-constrained embedded security terminals and edge-trusted computing devices, easily creating a significant energy bottleneck issues.
Li Jinming, Chao Zhiheng, Han Xinye
doaj
ABSTRACT Chitosan, a polysaccharide upcycled from biowaste, has long promised sustainable, biocompatible, and antimicrobial films and devices, an appeal reinforced by its recent regulatory recognition, with several chitosan‐based antibacterial dressings gaining clearance through the Food and Drug Administration's 510(k) pathway.
Jacopo Nicoletti +16 more
wiley +1 more source
The Impact of Asymmetric Transistor Aging on Clock Tree Design Considerations
Ensuring integrated circuits (ICs) operate reliably throughout their expected service life is more vital than ever, particularly as they become increasingly central to mission-critical applications.
Firas Ramadan +3 more
doaj +1 more source
Optoelectronic synaptic devices based on solution‐processed molecular telluride GST‐225 phase‐change inks are demonstrated for three‐factor learning. A global optical signal broadcast through a silicon waveguide induces non‐volatile conductance updates exclusively in locally electrically flagged memristors.
Kevin Portner +14 more
wiley +1 more source
Adaptive clock gating for shift register based circuits
Clock gating is a widely used technique for dynamic power reduction in VLSI design. In its most straightforward application it allows disabling the clock signal of a flip-flop once its state is no longer subject to changes.
Koren I., Wimer S., Cohen I.
core +1 more source
Fully additive vertical organic electrochemical transistors (vOECTs) with channel‐length of 226 nm on a 50 µm compostable substrate achieve >106 current modulation and ∼36 mS transconductance. Ion‐selective integration enables 1.1 mA dec−1 sensitivity and 36 µm detection limit, highlighting a scalable platform for sustainable electronics and ...
Giulia Frusconi +3 more
wiley +1 more source

