Results 111 to 120 of about 227,711 (205)
Leakage power minimisation techniques for embedded processors
Leakage power is a growing concern in modern technology nodes. In some current and emerging applications, speed performance is uncritical but many of these applications rely on untethered power making energy a primary constraint.
Mistry, Jatin N., Mistry, Jatin N
core +1 more source
Advances in Sustainable and Wearable Textile Based Soft Robotics
This Review examines advances in wearable textile‐based soft robotics, focusing on sustainable materials, integrated sensing, and scalable actuation. It discusses manufacturing and system integration across healthcare, assistive robotics, prosthetics, and human–machine interfaces, and highlights key challenges in circular design, including life‐cycle ...
Zahir Abbas +6 more
wiley +1 more source
Clock gating techniques using 0.18um CMOS technology / Muhammad Syafiq Ab Rahim [PDF]
This thesis presents a study of clock gating techniques using 0.18um CMOS technology. The objective of this paper is to study the speed of the clock gating technique.
Ab Rahim, Muhammad Syafiq
core
Clock-gating-aware low launch WSA test pattern generation for at-speed scan testing [PDF]
Capture power management has become a necessity to avoid at-speed scan testing yield loss, especially for modern complex and low power designs. This paper proposes a test pattern generation methodology that utilizes the available clock-gating mechanism ...
Lin, Yi-Tsung +4 more
core +1 more source
Multimode Oxide‐Based Optoelectronic Memtransistor for In‐Sensor Vision Processing
A multimode optoelectronic memtransistor (OEMT) is demonstrated for vision explainable artificial intelligence (VXAI) hardware. By integrating optical sensing, electrical masking, and non‐volatile memory, the device enables key operations required for generating saliency information.
Min Gu Lee +10 more
wiley +1 more source
Power optimization through clock gating standard cells designed for OSU VLSIARCH SKY130 process
This thesis proposes the integration of a D-Latch based clock gating cell into the OSU VLSIARCH SKY130 standard cell set, for power optimization purposes.
Lusk, Hunter Brady
core
This review revisits optoelectronic neuromorphic devices that extend from unimodal sensing toward multimodal perception. Five types of stimuli‐to‐output information flow that are classified based on the device roles within the system and applications are summarized and discussed.
Jihyun Shin +6 more
wiley +1 more source
Power Optimization for 3D Vertex Shader Using Clock Gating
With technology increasingly and the needs of high performance and multiple functionalities, power dissipation has be a bottleneck in microprocessors. And clock power is the most percentage of total power dissipation.
Yen, Huai-yu
core
Conformational Switching of Proteins on Material Surfaces Enabled by Peptide‐Oriented Adsorption
Responsive biointerfaces could be achieved using conformationally responsive proteins; however, their interconversion can be lost upon surface adsorption. Herein, we demonstrate that the incorporation a Au binding peptide into calmodulin allows for binding control on Au wherein the protein retains conformational switching. This capability was confirmed
Sakthirupini Ramamurthy +7 more
wiley +1 more source
A scalable, solution‐processed WSe2/ZrO2‐x van der Waals heterostructure realizes a light‐induced field‐tunneling synapse (LIFTS) that activates exclusively under bright illumination, emulating the photopic adaptation of the human retina at the device level.
Kijeong Nam +10 more
wiley +1 more source

