Results 231 to 240 of about 2,954 (262)
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1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287), 1998
The paper describes a new DC modeling methodology applicable to CMOS integrated circuits. It is named operating point driven DC formulation because the operating point is specified directly, and the device dimensions W and L are determined out of it. With other methods, one specifies the device dimensions W and L and determines the operating point. Our
Francky Leyn +2 more
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The paper describes a new DC modeling methodology applicable to CMOS integrated circuits. It is named operating point driven DC formulation because the operating point is specified directly, and the device dimensions W and L are determined out of it. With other methods, one specifies the device dimensions W and L and determines the operating point. Our
Francky Leyn +2 more
openaire +1 more source
Design Considerations in HighTemperature Analog CMOS Integrated Circuits
2009Tbe design of CMOS analog integrated circuits to be operated at elevated junction temperatures is discussed. Considerations wbich have successfully been implemented in tbe design of basic analog cells for operation over the 25??-250?? C range are empbasized.
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Integration of a CMOS mixed-analog-digital eight channel speech transmission circuit
IEEE Proceedings of the Custom Integrated Circuits Conference, 1990An eight-channel speech transmission circuit with single sideband modulation has been developed. The circuit includes signal amplifiers, various modulators, and filters. Clocks for the switched capacitor filters, the modulators, and the external controller are derived from the integrated oscillator.
F. Cepl +4 more
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Modeling and Design for Reliability of Analog Integrated Circuits in Nanometer CMOS Technologies
2011Advanced scaling of CMOS technology in the nanometer range allows to design highly integrated mixed-signal systems, but also poses many challenges due to increased variability and reliability problems. Both have to be addressed by the designer, at IC design time or at IC run time.
Georges Gielen +2 more
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Robust design and yield enhancement of low-voltage CMOS analog integrated circuits
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 2001Basic CMOS low-voltage analog cells are introduced and used in the design of low-voltage CMOS multipliers. A statistical design flow for enhancing the parametric functional yield of these low-voltage circuits, with the goal of achieving a robust performance, is described.
T.B. Tarim, M. Ismail, H.H. Kuntman
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RF Coupling in CMOS Analog Integrated Circuits
9th International Symposium on EMC Joint with 20th International Wroclaw Symposium on EMC, EMC Europe 2010, 2010Philipp Schröter, Frank Klotz
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A flexible statistical model for CAD of submicrometer analog CMOS integrated circuits
Proceedings of 1993 International Conference on Computer Aided Design (ICCAD), 2002Christopher Michael +2 more
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Stochastic Degradation Modeling and Simulation for Analog Integrated Circuits in Nanometer CMOS
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 2013Georges G. E. Gielen, Elie Maricau
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Design of CMOS Analog Integrated Fractional-Order Circuits
2017Georgia Tsirimokou +2 more
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