Results 41 to 50 of about 3,169,862 (288)
Any large-scale spiking neuromorphic system striving for complexity at the level of the human brain and beyond will need to be co-optimized for communication and computation.
Bryce A. Primavera +2 more
doaj +1 more source
Historical Foundation and Practical Guideline for Ferroelectric Switching Kinetic Studies
The P and U pulses in the conventional PUND measurements are not identical because of the interplay between switching current and the measurement circuit components. This circuit effect can lead to a shift in polarization transients and misinterpreted physics in the switching kinetics.
Yi Liang, Pat Kezer, John T. Heron
wiley +1 more source
Design of a process monitor and of peripheral circuits enabling the characterisation of CMOS 45nm Ultra Low Power and Litho Friendly optimised standard cells [PDF]
L’evoluzione della tecnologia CMOS è caratterizzata dallo scaling delle dimensioni dei dispositivi e dalla riduzione del consumo di potenza. Dal momento che le difficoltà di realizzazione aumentano al diminuire delle dimensioni, nei nodi tecnologici più ...
TAGLIABUE, CLAUDIO
core +1 more source
Monolithic UV‐ozone oxidation of Ta forms an ultrathin Ta2O5/TaOx bilayer enabling resistive switching with a vertical defect gradient. A stoichiometric surface layer over an oxygen‐deficient sublayer promotes localized filament nucleation near the top interface, enabling low‐voltage operation, and reduced cycle‐to‐cycle variability.
Seunghoon Yang +11 more
wiley +1 more source
As the traditional silicon-based CMOS technology advances into the nanoscale stage, approaching its physical limits, the Carbon Nanotube Field-effect Transistor (CNTFET) is considered to be the most significant transistor technology beyond Moore’s era ...
Zhifeng Chen +5 more
doaj +1 more source
The work reports on the design and performance of a low-noise low-cost CMOS transimpedance amplifier (TIA). The proposed circuit shall be employed in optical time-domain reflectometers and is implemented using an affordable 0.18 µm 1.8 V CMOS process ...
Romanova Agata, Barzdenas Vaidotas
doaj +1 more source
Neurohybrid Memristive CMOS-Integrated Systems for Biosensors and Neuroprosthetics
Here we provide a perspective concept of neurohybrid memristive chip based on the combination of living neural networks cultivated in microfluidic/microelectrode system, metal-oxide memristive devices or arrays integrated with mixed-signal CMOS layer to ...
Alexey Mikhaylov +23 more
doaj +1 more source
Multimode Oxide‐Based Optoelectronic Memtransistor for In‐Sensor Vision Processing
A multimode optoelectronic memtransistor (OEMT) is demonstrated for vision explainable artificial intelligence (VXAI) hardware. By integrating optical sensing, electrical masking, and non‐volatile memory, the device enables key operations required for generating saliency information.
Min Gu Lee +10 more
wiley +1 more source
CMOS microelectronics design has evolved tremendously during the last two decades. The evolution of CMOS devices to short channel designs where the feature size is below 1000 nm brings a great deal of uncertainty in the way the microelectronics design ...
Graciano Dieck-Assad +2 more
doaj +1 more source
Transconductance/drain current based sensitivity analysis for analog CMOS integrated circuits
Recent studies have shown that transistor variability and ageing phenomena are responsible for variation of transconductance (gm) and drain current (ID) in MOSFETs. It is therefore important to perform sensitivity analysis at the earliest design stage in order to minimize effects of ageing.
Ou, Jack, Maris Ferreira, Pietro
openaire +2 more sources

