Results 181 to 190 of about 541 (202)

A 0.35μm CMOS 200kHz–2GHz Fully-Analogue Closed-Loop Circuit for Continuous-Time Clock Duty-Cycle Correction in Integrated Digital Systems

2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018
In this work we present a fully-analogue Duty-Cycle Corrector (DCC) based on a closed-loop circuit topology operating a continuous-time 50% duty-cycle regulation of the generated output clock signal. In particular, a suitable feedback sub-system detects the duty-cycle values of the input and output clock signals and provides a corresponding control ...
De Marcellis A., Faccio M., Palange E.
openaire   +1 more source

Realistic faults mapping scheme for the fault simulation of integrated analogue CMOS circuits

Proceedings International Test Conference 1996. Test and Design Validity, 2002
A new fault modelling scheme for integrated analogue CMOS circuits referred to as Local Layout Realistic Fault Mapping is introduced. It is aimed at realistic fault assumptions prior to the final layout by investigating typical "local" layout structures of analogue designs.
openaire   +1 more source

<title>Linearisation for analogue optical links using integrated CMOS predistortion circuits</title>

SPIE Proceedings, 2005
Fu-Chuan Lin, David M. Holburn
openaire   +1 more source

CMOS analogue amplifier circuits optimisation using hybrid backtracking search algorithm with differential evolution

Journal of Experimental and Theoretical Artificial Intelligence, 2016
S Mallick, Rajib Kar
exaly  

Modelling and application of fully depleted SOI MOSFETs for low voltage, low power analogue CMOS circuits

Solid-State Electronics, 1996
Denis Flandre
exaly  

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

IEEE Journal of Solid-State Circuits, 2013
Tetsuya Hirose, Nobutaka Kuroki
exaly  

Thread‐Like CMOS Logic Circuits Enabled by Reel‐Processed Single‐Walled Carbon Nanotube Transistors via Selective Doping

Advanced Materials, 2017
Jae-Sang Heo, Taehoon Kim, Seok-Gyu Ban
exaly  

Analogue Gravity

Living Reviews in Relativity, 2005
Carlos Barceló, Stefano Liberati, Matt Visser   +2 more
exaly  

Optimal sizing and design of CMOS analogue amplifier circuits using craziness‐based particle swarm optimization

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 2016
S Mallick
exaly  

Analogue Gravity

Living Reviews in Relativity, 2011
Carlos Barceló, Stefano Liberati, Matt Visser   +2 more
exaly