Results 171 to 180 of about 557 (199)

Spiking Neural Networks in Imaging: A Review and Case Study. [PDF]

Sensors (Basel)
Voudaskas M, MacLean JI, Dutton NAW, Stewart BD, Gyongy I.   +4 more
europepmc   +1 more source

PbS colloidal quantum dots imagers: From single devices to arrays, flexible platforms, and CMOS‐integrated systems

FlexMat, EarlyView.
Abstract Imagers operating in the visible to near‐infrared (NIR) range play an important role in applications such as industrial sorting, security surveillance, and autonomous driving. However, conventional imaging technologies based on silicon and III–V semiconductors suffer from several limits, including restricted spectral range, high fabrication ...
Xin Hong, Songdi Zhang, Runtian Han, Peng Wang, Wenjie Deng   +4 more
wiley   +1 more source

Photonic-electronic integrated circuit-based coherent LiDAR engine. [PDF]

Nat Commun
Lukashchuk A, Yildirim HK, Bancora A, Lihachev G, Liu Y, Qiu Z, Ji X, Voloshin A, Bhave SA, Charbon E, Kippenberg TJ.   +10 more
europepmc   +1 more source

IMPACT: In-Memory ComPuting Architecture based on Y-FlAsh Technology for Coalesced Tsetlin machine inference. [PDF]

Philos Trans A Math Phys Eng Sci
Ghazal O, Wang W, Kvatinsky S, Merchant F, Yakovlev A, Shafik R.   +5 more
europepmc   +1 more source

Transparent conductive oxides as a material platform for a realization of all-optical photonic neural networks. [PDF]

Sci Rep
Gosciniak J, Khurgin JB.
europepmc   +1 more source

Light-induced negative differential resistance and neural oscillations in neuromorphic photonic semiconductor micropillar sensory neurons. [PDF]

Sci Rep
Jacob B, Silva J, Figueiredo JML, Nieder JB, Romeira B.   +4 more
europepmc   +1 more source

High-order dynamics in an ultra-adaptive neuromorphic vision device. [PDF]

Nat Nanotechnol
Xu J, Jiang B, Wang W, Guo Z, Gao J, Hu X, Qin J, Ran L, Lin L, Cai S, Li Y, Zhou F.   +11 more
europepmc   +1 more source

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A design for testability approach for nano-CMOS analogue integrated circuits

International Journal of Electronics, 2013
Dependability requirements must be considered from the beginning when designing safety-critical systems. Therefore, testing should even be considered earlier, intertwined with the design process. The process of designing for better testability is called design for testability (DfT).
Belgacem Hamdi, Ka Lok Man, Rached Tourki   +2 more
exaly   +2 more sources

Robust design of low power CMOS analogue integrated circuits

IEE Proceedings - Circuits, Devices and Systems, 2001
As feature sizes move into the deep submicron ranges and power supply voltages are reduced, the effect of both device mismatch and inter-die process variations on the performance and reliability of analogue integrated circuits is magnified. The statistical MOS (SMOS) model accounts for both inter-die and intra-die variations.
T.B. Tarim, M. Ismail
openaire   +1 more source

A 0.35μm CMOS 200kHz–2GHz Fully-Analogue Closed-Loop Circuit for Continuous-Time Clock Duty-Cycle Correction in Integrated Digital Systems

2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018
In this work we present a fully-analogue Duty-Cycle Corrector (DCC) based on a closed-loop circuit topology operating a continuous-time 50% duty-cycle regulation of the generated output clock signal. In particular, a suitable feedback sub-system detects the duty-cycle values of the input and output clock signals and provides a corresponding control ...
De Marcellis A., Faccio M., Palange E.
openaire   +1 more source