Results 1 to 10 of about 7,631,733 (204)

Abridging CMOS Technology [PDF]

Nanomaterials, 2022
Whether from a device physics, fabrication technology, or process economics point of view, the practice of downsizing silicon-based CMOS devices will soon end [...]
Hei Wong
doaj   +4 more sources

State of the Art and Future Perspectives in Advanced CMOS Technology. [PDF]

Nanomaterials (Basel), 2020
The international technology roadmap of semiconductors (ITRS) is approaching the historical end point and we observe that the semiconductor industry is driving complementary metal oxide semiconductor (CMOS) further towards unknown zones.
Radamson HH, Zhu H, Wu Z, He X, Lin H, Liu J, Xiang J, Kong Z, Xiong W, Li J, Cui H, Gao J, Yang H, Du Y, Xu B, Li B, Zhao X, Yu J, Dong Y, Wang G.   +19 more
europepmc   +2 more sources

A 4-fJ/Spike Artificial Neuron in 65 nm CMOS Technology. [PDF]

Front Neurosci, 2017
As Moore's law reaches its end, traditional computing technology based on the Von Neumann architecture is facing fundamental limits. Among them is poor energy efficiency.
Sourikopoulos I, Hedayat S, Loyez C, Danneville F, Hoel V, Mercier E, Cappy A.   +6 more
europepmc   +2 more sources

Characterization and Modeling of 28-nm Bulk CMOS Technology Down to 4.2 K

IEEE Journal of the Electron Devices Society, 2018
This paper presents an experimental investigation, compact modeling, and low-temperature physics-based modeling of a commercial 28-nm bulk CMOS technology operating at cryogenic temperatures. The physical and technological parameters are extracted at 300,
Farzan Jazaeri, Christian Enz, Arnout Beckers   +2 more
exaly   +2 more sources

Abridging the CMOS Technology II

Nanomaterials
As silicon CMOS devices approach their physical and technological miniaturization limits, Moore’s Law is expected to persist for several more cycles, thanks to innovative, more compact layout structures [...]
Hei Wong
doaj   +3 more sources

Image sensor pixel with on-chip high extinction ratio polarizer based on 65-nm standard CMOS technology

Optics Express, 2013
In this study, we demonstrate a polarization sensitive pixel for a complementary metal-oxide-semiconductor (CMOS) image sensor based on 65-nm standard CMOS technology.
Jun Ohta, Kiyotaka Sasagawa, Takashi Tokuda   +2 more
exaly   +2 more sources

Generic logic block based on bias-gated 2D MoS2 transistors [PDF]

Nature Communications
Integrating two-dimensional (2D) semiconductors and CMOS technology is a promising pathway for next-generation integrated circuits. However, the implementation of this strategy is hindered by the limited polarity modulation of 2D semiconductors and the ...
Xiaofu Wei, Zhangyi Chen, Kuanglei Chen, Jinsen Shang, Li Gao, He Jiang, Huihui Yu, Mengyu Hong, Xiankun Zhang, Zheng Zhang, Yue Zhang   +10 more
doaj   +2 more sources

Scaling silicon-based quantum computing using CMOS technology [PDF]

Nature Electronics, 2020
As quantum processors grow in complexity, attention is moving to the scaling prospects of the entire quantum computing system, including the classical support hardware. Recent results in high-fidelity control of individual spins in silicon, combined with
M. Gonzalez-Zalba, S. D. Franceschi, E. Charbon, T. Meunier, M. Vinet, A. Dzurak   +5 more
semanticscholar   +1 more source

A Charge-Accumulation Based High-Performance CMOS Circuit [PDF]

Port Said Engineering Research Journal, 2022
There is no doubt that complementary metal-oxide semiconductor (CMOS) circuits with wide fan-in suffers from degraded performance. In this paper, a circuit that depends on charge accumulation is proposed as an alternative to conventional CMOS design. The
Sherif Sharroush
doaj   +1 more source

Hardware Security for and beyond CMOS Technology [PDF]

ACM International Symposium on Physical Design, 2020
As with most aspects of electronic systems and integrated circuits, hardware security has traditionally evolved around the dominant CMOS technology.
J. Knechtel
semanticscholar   +1 more source