Results 121 to 130 of about 331 (175)
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Comparative Study and Analysis of CNTFET and Tunnel CNTFET

Journal of Nanoelectronics and Optoelectronics, 2018
, Mamta Khosla, Khosla Mamta
exaly   +2 more sources

Ternary SRAM circuit designs with CNTFETs

International Journal of Circuit Theory and Applications, 2023
SummaryStatic random‐access memory (SRAM) is a cornerstone in modern microprocessors architecture, as it has high power consumption, large area, and high complexity. Also, the stability of the data in the SRAM against the noise and the performance under the radian exposure are main concern issues.
Abdelrahman, Doaa   +4 more
openaire   +2 more sources

CNTFETs

2020
In recent years, carbon nanotube (CNT) emerged as one of the promising materials that shows various advantages over silicon material (e.g., aggressive channel length scaling due to absence of mobility degradation, variable bandgap with single material, ultra-thin body device that is possible due to smaller diameter [1-3nm], and compatibility of CNT ...
Amandeep Singh   +2 more
openaire   +1 more source

Tunneling CNTFETs

Journal of Computational Electronics, 2007
Based on the non-equilibrium Green’s function formalism we numerically studied gate-controlled tunneling carbon nanotube field-effect transistors. The effect of doping concentration on the performance of the device has been investigated. We show that an asymmetric doping profile can improve the Ion/Ioff ratio of the device improves.
Mahdi Pourfath   +2 more
openaire   +1 more source

CNTFET-RFB: An Error Correction Implementation for Multi-valued CNTFET Logic

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL), 2016
This paper presents a solution for fault-tolerance in logic circuits comprised of Carbon Nanotube FETs (CNTFETs). This work builds on a recently proposed method for errorcorrection called Restorative Feedback (RFB). The RFB method is a variant of Triple-Modular Redundancy (TMR) that utilizes the fault masking capabilities of the Muller C element to ...
Gopalakrishnan Sundararajan   +1 more
openaire   +1 more source

Stability Analysis in CNTFETs

IEEE Electron Device Letters, 2013
We present a Nyquist stability criterion, together with step time responses, for the small-signal equivalent circuit model of common-source-configured carbon-nanotube (CNT) field-effect transistors (CNTFETs) made of 100 CNTs at 10-nm pitch as well as single CNTs, for the first time.
Saeed Haji-Nasiri   +1 more
openaire   +1 more source

Dissipative transport in CNTFETs

Journal of Computational Electronics, 2007
Based on the non-equilibrium Green’s function formalism the performance of carbon nanotube field-effect transistors has been studied. The effects of elastic scattering and the impact of parameters of inelastic scattering, such as electron-phonon coupling strength and phonon energy, on the device performance are analyzed.
Mahdi Pourfath   +2 more
openaire   +1 more source

CNTFET basics and simulation

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006., 2006
This paper provides an overview of current types of CNTFETs and of some compact models. Using the available models, the influence of the parameters on the device characteristics was simulated and analyzed. The conclusion is that the tube diameter influences not only the current level, but also the threshold voltage of the CNTFET, while the contact ...
T. Dang, L. Anghel, R. Leveugle
openaire   +1 more source

Design of explicit-pulse generators with CNTFET

2015 IEEE 11th International Conference on ASIC (ASICON), 2015
A novel single-edge pulse generator (S-PG) and a dual-edge pulse generator (D-PG) are designed with Carbon Nanotube Field Effect Transistor (CNTFET). In order to generate pulse signal alternately, the output is controlled by delayed clock signal. The single-edge pulse generator without pseudo PMOS can reduce power consumption.
Wang Qian, Wang Pengjun, Gong Daohui
openaire   +1 more source

Performance study of 12-CNTFET and GDI CNTFET based full adder in HSPICE

2014 International Conference on Advances in Engineering & Technology Research (ICAETR - 2014), 2014
This manuscript reports and analyzes 12-CNTFET and GDI CNTFET based full adder implementation at 32 nm level. As figures of merit, stability, power dissipation and Power Delay Product (PDP) are considered for the best overall performance. Intensive HSPICE simulations have been performed to investigate the distribution of the power and delay of the ...
null Habib Muhammad Nazir Ahmad   +4 more
openaire   +1 more source

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