Results 271 to 280 of about 366,258 (347)
Horizontal die cracking as a yield and reliability problem in integrated circuit devices
Microelectronics Reliability, 1989 openalex +2 more sources
The reliability of Epoxy as a die-attach in digital and linear integrated circuits
Microelectronics Reliability, 1975 openalex +2 more sources
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Highly Integrated 4 Tbps Silicon Photonic IC for Compute Fabric Connectivity
IEEE Symposium on High-Performance Interconnects, 2022In this work we present the design and performance of a high bandwidth, low power, low latency, and high-density Silicon Photonic integrated circuit (SiPIC) for compute interconnects.
S. Fathololoumi +11 more
semanticscholar +1 more source
A 16-Element Fully Integrated 28-GHz Digital RX Beamforming Receiver
IEEE Journal of Solid-State Circuits, 2021A 16-element fully integrated 28-GHz digital beamformer combines with a custom eight-layer LTCC substrate with a 4 $\times \,\,{4}$ patch antenna array for a complete 16-element single-chip 28-GHz millimeter-wave (mm-wave)-to-digital beamforming system.
Rundao Lu +5 more
semanticscholar +1 more source
2018 19th International Conference of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM), 2018
This work represents results obtained during research of high frequency IC packaging. The interface between IC die and PCB is described and its inner structure is developed: contact pads on IC die, bondwires and chip outputs. As an example of method developed the interface effects into device development and characteristics are shown for the LNA module
Andrey A. Antonov, Igor K. Surin
openaire +1 more source
This work represents results obtained during research of high frequency IC packaging. The interface between IC die and PCB is described and its inner structure is developed: contact pads on IC die, bondwires and chip outputs. As an example of method developed the interface effects into device development and characteristics are shown for the LNA module
Andrey A. Antonov, Igor K. Surin
openaire +1 more source
A die-on-board PCB for testing high-speed integrated circuits
2015 IEEE Applied Electromagnetics Conference (AEMC), 2015Chip-on-board (COB) printed circuit boards (PCB) appear to be a very attractive solution for testing high-speed integrated circuits (IC). Attaching the bare die directly on a PCB takes away the packaging cost, which is as high as the chip fabrication cost or more when it comes to the high-speed ICs. Wafer probing is a good alternative, but may not come
Mukul Ratwani +3 more
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2018 15th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2018
In this paper, installation automatic die bonding machine and optimization parameters were studied in die attach process for integrated circuit (IC) packaging. Die attach process is one that is very important IC packaging manufacturing. This process is attaching a die or chip take to leadframe or substrate using die bonding machine.
Tanatpol Nanthavittayaporn +3 more
openaire +1 more source
In this paper, installation automatic die bonding machine and optimization parameters were studied in die attach process for integrated circuit (IC) packaging. Die attach process is one that is very important IC packaging manufacturing. This process is attaching a die or chip take to leadframe or substrate using die bonding machine.
Tanatpol Nanthavittayaporn +3 more
openaire +1 more source
"The Reliability of Epoxy as a Die Attach in Digital and Linear Integrated Circuits"
12th International Reliability Physics Symposium, 1974The implementation and advantages of epoxy die-attach are described with special emphasis given to areas of mechanical integrity and product stability. A recent special test program indicates that the epoxy die-attach process results in reliable product.
Bernard M. Pietrucha, Eugene M. Reiss
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Proceedings of the 5th Electronics Packaging Technology Conference (EPTC 2003), 2004
Delamination at the interface between a silicon backside and the die attach paste has been reported, and this delamination led to package cracking, resulting in reliability problems. In this paper, a series of experiments was conducted to investigate factors affecting the interfacial adhesion between the die back side and the attach paste of an ...
E. Low, G.H. Lim, A.C. Tan
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Delamination at the interface between a silicon backside and the die attach paste has been reported, and this delamination led to package cracking, resulting in reliability problems. In this paper, a series of experiments was conducted to investigate factors affecting the interfacial adhesion between the die back side and the attach paste of an ...
E. Low, G.H. Lim, A.C. Tan
openaire +1 more source