Results 21 to 30 of about 124,738 (302)
Number Determination of Successfully Packaged Dies Per Wafer Based on Machine Vision
Machines, 2015 Packaging the integrated circuit (IC) chip is a necessary step in the manufacturing process of IC products. In general, wafers with the same size and process should have a fixed number of packaged dies.
Hsuan-Ting Chang +2 more
doaj +1 more source
A Low-Noise Interface ASIC for MEMS Disk Resonator Gyroscope
Micromachines, 2023 This paper proposes a low-noise interface application-specific integrated circuit (ASIC) for a microelectromechanical systems (MEMS) disk resonator gyroscope (DRG) which operates in force-to-rebalance (FTR) mode.
Wenbo Zhang +7 more
doaj +1 more source
Sensors, 2018 Covering a whole surface of a robot with tiny sensors which can measure local pressure and transmit the data through a network is an ideal solution to give an artificial skin to robots to improve a capability of action and safety.
Mitsutoshi Makihata +5 more
doaj +1 more source
Machine Learning Integrated Pseudo-3-D Flow for Monolithic 3-D ICs
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2021 Monolithic 3-D (M3-D) IC design is a manufacturing technique that opens several new possibilities of chip design and exploration for power, performance, area (PPA), and cost benefits.
Sai Pentapati, Bon Woong Ku, Sungkyu Lim
doaj +1 more source
Reference-free detection of semiconductor assembly defect [PDF]
, 2005 This paper aims at developing a novel defect detection algorithm for the semiconductor assembly process by image analysis of a single captured image, without reference to another image during inspection.
Chung, R +4 more
core +1 more source
, 2003 Modeling and simulation are critical to transfer CMP from an engineering 'art' to an engineering 'science'. Research efforts in CMP modeling have been attempted in the last decade. There is an urgent need to review the current models including their limitations and future research directions systematically.
Jianfeng Luo, David Dornfeld
openalex +2 more sources
Embedded 5V-to-3.3V Voltage Regulator for Supplying Digital ICs in 3.3V CMOS Technology [PDF]
, 1998 A fully integrated 5 V-to-3.3 V supply voltage regulator for application in digital IC's has been designed in a 3.3 V 0.5 μm CMOS process. The regulator is able to deliver peak current transients of 300 mA, while the output voltage remains within a ...
Besten, Gerrit W. den, Nauta, Bram
core +2 more sources
A voltage limiter circuit for indoor light energy harvesting applications [PDF]
, 2013 A voltage limiter circuit for indoor light energy harvesting applications is presented. This circuit is a part of a bigger system, whose function is to harvest indoor light energy, process it and store it, so that it can be used at a later time.
J.A. Paradiso, L. Magnelli, S. Chalasani
core +3 more sources
Fast LDO Handles a Wide Range of Load Currents and Load Capacitors, up to 100 mA and Over 1μF
IEEE Access, 2022 This paper proposes a low dropout voltage regulator (LDO) that exhibits both a fast response to load transients and the ability to handle practically any load capacitor.
Alina-Teodora Grajdeanu +5 more
doaj +1 more source
An 8.72 µW Low-Noise and Wide Bandwidth FEE Design for High-Throughput Pixel-Strip (PS) Sensors
Sensors, 2021 The front-end electronics (FEE) of the Compact Muon Solenoid (CMS) is needed very low power consumption and higher readout bandwidth to match the low power requirement of its Short Strip application-specific integrated circuits (ASIC) (SSA) and to handle
Folla Kamdem Jérôme +6 more
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