Results 71 to 80 of about 41,452,026 (246)

Comparing Digital Phase-Locked Loop and Kalman Filter for Clock Tracking in Ultrawideband Location System

Journal of Electrical and Computer Engineering, 2018
For timing and synchronization system, digital phase-locked loop (DPLL) and Kalman filter all have been widely used as the clock tracking and clock correction schemes for the similar structure and properties.
Qian Gao, Chong Shen, Kun Zhang
doaj   +1 more source

Theoretical Upper and Lower Limits for Normalized Bandwidth of Digital Phase-Locked Loop in GNSS Receivers. [PDF]

Sensors (Basel), 2023
Song YJ, Pany T, Won JH.
europepmc   +1 more source

Review of Gastrointestinal Capsule Robots: Materials, Actuation, Diagnostics, and Therapeutics

Advanced Science, EarlyView.
This review examines gastrointestinal capsule robots through a systems engineering lens, covering shell materials, actuation and localization strategies, diagnostic modalities, therapeutic interventions, and commercialization status. By mapping the complete technological chain from fabrication to clinical deployment, this work identifies critical gaps ...
Zengsheng Li, Zhongguo Ren, Yiliang Lin, Xianfeng Xia, Tianlong Li, Kai Fung Chan, Philip Wai Yan Chiu, Wei Peng Yong, Mengmeng Sun   +8 more
wiley   +1 more source

FPGA-Based Implementation of All-Digital QPSK Carrier Recovery Loop Combining Costas Loop and Maximum Likelihood Frequency Estimator

International Journal of Reconfigurable Computing, 2014
This paper presents an efficient all digital carrier recovery loop (ADCRL) for quadrature phase shift keying (QPSK). The ADCRL combines classic closed-loop carrier recovery circuit, all digital Costas loop (ADCOL), with frequency feedward loop, maximum ...
Kaiyu Wang, Zhiming Song, Xianwei Qi, Qingxin Yan, Zhenan Tang   +4 more
doaj   +1 more source

A Digitalized Silicon Microgyroscope Based on Embedded FPGA

Sensors, 2012
This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high ...
Dunzhu Xia, Cheng Yu, Yuliang Wang
doaj   +1 more source

Table-Based Adaptive Digital Phase-Locked Loop for GNSS Receivers Operating in Moon Exploration Missions. [PDF]

Sensors (Basel), 2022
Song YJ, Won JH.
europepmc   +1 more source

Neuromorphic Devices and Computing for Sensing, Memory, and Control

Advanced Science, EarlyView.
This review introduces neuromorphic devices made from diverse materials. These devices mimic neuronal functions and architectures and, when integrated with artificial or biological computing, can form closed loops with neurons for pressure, optical, acoustic, and biochemical sensing and modulation.
Zhengguang Zhu, Nicholas Schaffer, Xiao Yang   +2 more
wiley   +1 more source

Inverse Design of Pre‐Strain via a Predictive Electromechanical Model for Enhanced Strain Sensing

Advanced Science, EarlyView.
An analytical electromechanical model rooted in microcrack evolution mechanics is globally calibrated from only eight pre‐strain datasets, enabling prediction of the complete sensing response at untested pre‐strain values within the calibrated design space (R2 > 0.99).
Jia‐Chen Shang, Rui Wang, Bo Lu, Ming‐Liang Song, Yu‐Yi Chen, Kuo Han, Xin‐Jie Feng, Bin Sun, Yao‐Guang Cao, Xiao‐Yu Yan, Shi‐Chun Yang   +10 more
wiley   +1 more source

Origin of Enhanced Efficiency and Reduced Roll‐Off in Organic Light‐Emitting Diodes Based on Pt(II) Complexes

Advanced Science, EarlyView.
Controlled Pt–Pt fine structure in square‐planar Pt(II) complexes governs metal–metal‐to‐ligand charge‐transfer (MMLCT) state formation, exciton dynamics, and organic light‐emitting diode performance. Short Pt–Pt contacts in Pt(fppz)2 enable coherent metal–metal coupling, sub‐microsecond emission and an external quantum efficiency of 29%, whereas ...
Atul Shukla, Sarah K. M. McGregor, Julian A. Steele, Innes K. Gale, Kiyoshi Miyata, Monirul Hassan, Christian McDonald, Romain J. Lepage, Eduardo Solano, Pilankatta K. Ramya, Cherumuttathu H. Suresh, Takumi Ehara, Chihaya Adachi, Ken Onda, Shih‐Chun Lo, Ebinazar B. Namdas   +15 more
wiley   +1 more source

A Background Jitter Calibration for ADCs Using TDC Phase Information From ADPLL

IEEE Access
The phase noise, commonly known as jitter, in Phase-Locked Loops (PLLs) is conventionally perceived as a stochastic process, necessitating a degree of tolerance in downstream circuits such as Analog-to-Digital Converters (ADCs). This paper addresses this
Haoyang Shen, Hao Zheng, Daniel O'Hare, Deepu John, Barry Cardiff   +4 more
doaj   +1 more source