A highly energy-efficient multi-core neuromorphic architecture for training deep spiking neural networks. [PDF]
Li M +18 more
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Recent progress in HfO<sub>2</sub>-based ferroelectric devices with oxide semiconductor channels: a comprehensive review. [PDF]
Kang HY +4 more
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Uniform TiN-Capped Co Buried Bit Lines for 4F<sup>2</sup> DRAM Vertical Channel Transistors: Mitigating Agglomeration with Co Nitridation. [PDF]
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An energy efficient processor array and memory controller for accurate processing of convolutional neural network-based inference engines. [PDF]
Deepika S, Arunachalam V.
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Evaluation of Performance in Vertical 1T-DRAM and Planar 1T-DRAM
NORIFUSA, Yuto, ENDOH, Tetsuo
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High-density three-dimensional integration of dynamic random-access memory using vertical dual-gate IGZO TFTs. [PDF]
Liao F +27 more
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Harnessing DRAM for accelerated arithmetic Operations
Diamantidis, Theocharis +1 more
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DiscoVir: an automated, web-based pipeline for viral metagenomics. [PDF]
Krausfeldt LE +5 more
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Integrated Model for Evidence-Based Risk Factor Prioritisation and Dynamic Resource Allocation in Hypertension Prevention and Control: A Study Protocol. [PDF]
Nweke M, Pillay J.
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