Results 41 to 50 of about 18,499 (235)

Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM

IEEE Access
The challenges associated with semiconductor are increasing because of the rapid changes in the semiconductor market and the extreme scaling of semiconductors, with some processes reaching their technological limits.
Hyojin Park, Gyuhyun Kil, Wonju Sung, Junghoon Han, Jungwoo Song, Byoungdeog Choi   +5 more
doaj   +1 more source

Improving DRAM Energy-efficiency

, 2022
The rapid growth of IoT triggered the exponential growth of generated data transferred to/from Cloud and emerging Edge servers. As a result, recent projections forecast that the DRAM subsystem will soon be responsible for more than 40% of the overall ...
Mukhanov, Lev, Karakonstantis, Georgios
core   +1 more source

Achieving High ON State Current through Ferroelectric Polarization‐Dependent Interfacial Resistance Switching in Undoped Orthorhombic HfO2 Films

Advanced Functional Materials, EarlyView.
Ferroelectric tunnel junction devices based on epitaxial undoped ferroelectric HfO2 films demonstrate stable switching endurance of over 106 switching cycles, low write voltages of ±3 V, 16 measured resistance states, and neuromorphic capability.
Markus Hellenbrand, Nuno Estrócio, Ji S. Kim, Babak Bakhit, Marian C. Istrate, Corneliu Ghica, Tiago Rebelo, Nives Strkalj, Abin Varghese, Bernardo Almeida, Luís S. Marques, Bipin Rajendran, Judith L. MacManus‐Driscoll, José P. B. Silva   +13 more
wiley   +1 more source

HMB in DRAM-less NVMe SSDs: Their usage and effects on performance.

PLoS ONE, 2020
Solid-state drives (SSDs) that do not have internal dynamic random-access memory (DRAM) are being widely spread for client SSD and embedded SSD markets in recent years because they are cheap and consume less power.
Kyusik Kim, Taeseok Kim
doaj   +1 more source

Modeling of Statistical Variation Effects on DRAM Sense Amplifier Offset Voltage

Micromachines, 2021
With the downscaling in device sizes, process-induced parameter variation has emerged as one of the most serious problems. In particular, the parameter fluctuation of the dynamic random access memory (DRAM) sense amplifiers causes an offset voltage ...
Kyung Min Koo, Woo Young Chung, Sang Yi Lee, Gyu Han Yoon, Woo Young Choi   +4 more
doaj   +1 more source

Making DRAM Refresh Predictable [PDF]

2010 22nd Euromicro Conference on Real-Time Systems, 2010
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Schedulability theory can assure deadlines for a given task set when periods and worst-case execution times (WCETs) of tasks are known.
Balasubramanya Bhat, Frank Mueller 0001
openaire   +1 more source

Neuromorphic Electronics for Intelligence Everywhere: Emerging Devices, Flexible Platforms, and Scalable System Architectures

Advanced Materials, EarlyView.
The perspective presents an integrated view of neuromorphic technologies, from device physics to real‐time applicability, while highlighting the necessity of full‐stack co‐optimization. By outlining practical hardware‐level strategies to exploit device behavior and mitigate non‐idealities, it shows pathways for building efficient, scalable, and ...
Kapil Bhardwaj, Roshni Satheesh Babu, Yuxin Xia, Eva Bestelink, Radu Sporea, Nikos Hastas, Ioannis Zeimpekis, Dimitra G. Georgiadou, Sayani Majumdar   +8 more
wiley   +1 more source

DRAM Minimal Databases

, 2020
The minimal set of DRAM databases.
Michael Shaffer
core   +1 more source

Atomic Layer Deposition of Metallic Molybdenum Dioxide Thin Films Enabling High‐k Rutile Capacitors

Advanced Materials Interfaces, EarlyView.
The first direct atomic layer deposition (ALD) process of molybdenum dioxide (MoO2) thin films is reported using molybdenum(II) acetate dimer (Mo2(OAc)4) and oxygen (O2) as precursors at 235°C–275°C. The films are crystalline, exceptionally pure, and conductive.
Alexey Ganzhinov, Miika Mattinen, Marko Vehkamäki, Kenichiro Mizohata, Mykhailo Chundak, Georgi Popov, Paavo Porri, Mikko Ritala, Matti Putkonen   +8 more
wiley   +1 more source

Rethinking cycle accurate DRAM simulation [PDF]

, 2019
Cycle accurate DRAM simulations have been the dominating architecture simulation model for DRAM for a long time. Although accurate, its poor simulation speed has not improved for years while a lot of other architecture simulators such as CPU and cache ...
Bruce Jacob, Radojković, Petar, Petar Radojković, Shang Li, Sánchez Verdejo, Rommel, Jacob, Bruce, Rommel Sánchez Verdejo, Li, Shang   +7 more
core   +1 more source