Results 31 to 40 of about 18,499 (235)
Implementation and Optimization of Apache Spark Cache System Based on Mixed Memory [PDF]
With increasing data scale in the “big data era”,in-memory computing frameworks have grown significantly.The mainstream in-memory computing framework Apache Spark uses memory to cache intermediate results,which greatly improves data processing ...
WEI Sen, ZHOU Haoran, HU Chuang, CHENG Dazhao
doaj +1 more source
Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations
The memory controller is in charge of managing DRAM maintenance operations (e.g., refresh, RowHammer protection, memory scrubbing) in current DRAM chips.
Yaglikci, A. Giray +4 more
core +1 more source
Circuit Optimization Method to Reduce Disturbances in Poly-Si 1T-DRAM
A capacitorless one-transistor dynamic random-access memory device (1T-DRAM) is proposed to resolve the scaling problem in conventional one-transistor one-capacitor random-access memory (1T-1C-DRAM).
Yejin Ha +3 more
doaj +1 more source
Novel Dual Work Function Buried Channel Array Transistor Process Design for Sub-17 nm DRAM
This paper introduces the smallest dynamic random access memory (DRAM) cell, which was implemented using a new transistor structure, the dual work function - buried channel array transistor (DWF-BCAT).
Dong-Sik Park +7 more
doaj +1 more source
As the feature size of the latest dynamic random access memory (DRAM) reaches the early 10 nm scale, it is becoming extremely challenging to build a robust word-line (WL).
Dongkyu Jang +7 more
doaj +1 more source
Background: The psychological features of the body image and the role of perceived social support for women with diastasis recti abdominis (DRAM) is significant for the treatment of this group of patients, but it is difficult to identify research on this
Bernadetta Izydorczyk +4 more
doaj +1 more source
Translation, Cross-cultural Adaptation and Reliability of Brazilian portuguese version of the DRAM Questionnaire for Psychometric Evaluation in Low Back Pain [PDF]
Objective Based on studies regarding pain physiology and its relation to emotional distress conditions, psychological evaluation became essential to determine the most favorable patient profiles to distinct therapeutic approaches.
Carlos Tucci Neto +4 more
doaj +3 more sources
DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems
Read and write requests from a processor contend for the main memory data bus. System performance depends heavily on when read requests are serviced since they are required for an application’s forward progress whereas writes do not need to be performed ...
Chang Joo Lee (5357972) +4 more
core +1 more source
A Survey of Hybrid Main Memory Architectures
Rapidly evolving technology, increased internet speedand capacity, and the widespread use of mobile technologies have increased thedemands for faster applications and less power consumption of modern electronicsystems.
Ahmet Sertbaş +3 more
doaj +1 more source

