Results 51 to 60 of about 18,499 (235)
This study achieves the synergistic integration of self‐powered sensing and edge AI acceleration to establish a real‐time fault diagnosis system. The proposed TENG‐based self‐powered bearing sensor (NSE‐TBS) and FPGA‐accelerated edge AI framework fundamentally break through the inherent limitations of conventional monitoring systems, including complex ...
Kehui Zhu +7 more
wiley +1 more source
In-Depth Review and Comparative Analysis of DRAM-Based PUFs
Dynamic Random-Access Memory Physical Unclonable Functions (DRAM PUFs) are gaining interest in hardware security, particularly for resource-constrained IoT devices such as smart sensors in the era of rapid digitalization. Since DRAM is present in most of
Yuin Yee Chew +3 more
doaj +1 more source
In-DRAM Cache Management for Low Latency and Low Power 3D-Stacked DRAMs
Recently, 3D-stacked dynamic random access memory (DRAM) has become a promising solution for ultra-high capacity and high-bandwidth memory implementations.
Ho Hyun Shin, Eui-Young Chung
doaj +1 more source
DRAM triggers lysosomal membrane permeabilization and cell death in CD4(+) T cells infected with HIV. [PDF]
Productive HIV infection of CD4(+) T cells leads to a caspase-independent cell death pathway associated with lysosomal membrane permeabilization (LMP) and cathepsin release, resulting in mitochondrial outer membrane permeabilization (MOMP).
Mireille Laforge +9 more
doaj +1 more source
The damage-regulator autophagy modulator 1 (DRAM-1) is a lysosomal protein that positively regulates autophagy in a p53-dependent manner. We aimed at analyzing the role of DRAM-1 in granulocytic differentiation of APL cells.
Humbert, Magali +3 more
core +1 more source
Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review
Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh +8 more
wiley +1 more source
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley +1 more source
Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case
In current systems, memory accesses to a DRAM chip must obey a set of minimum latency restrictions specified in the DRAM standard. Such timing parameters exist to guarantee reliable operation.
Onur Mutlu (5357288) +6 more
core +1 more source
Temperature‐graded ALD of HfZrOx (HZO) enables strain‐enhanced stabilization of the ferroelectric o‐phase, achieving simultaneously high polarization, fast switching, and robust endurance in BEOL‐compatible FeCAPs. ABSTRACT Ferroelectric Hf0.5Zr0.5O2 (HZO) capacitors hold great promise for next‐generation nonvolatile memory and logic applications ...
Sheng‐Yen Zheng +5 more
wiley +1 more source
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source

