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FIR filters with field-programmable gate arrays

Journal of VLSI signal processing systems for signal, image and video technology, 1993
Distributed arithmetic techniques are the key to efficient implementation of DSP algorithms in FPGAs. The distributed arithmetic process is briefly described. A representative DSP design application in the form of an 8 tap FIR filter is offered for the Xilinx XC3042 field programmable logic array (FPGA).
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A Shogi Processor with a Field Programmable Gate Array

2001
In this paper we describe the architecture of a shogi processor based on reconfigurable hardware. For our implementation, we have used Field Programmable Gate Arrays (FPGAs), which can be reconfigured dynamically by downloading configuration data from host computers.
Yohei Hori   +4 more
openaire   +1 more source

Educational use of Field Programmable Gate Arrays

1994
Traditionally, digital logic designs in undergraduate courses are described on paper and implemented with TTL SSI/MSI components. These standard logic devices have proven to be an inexpensive approach, but require “wirewrapping” and other similar means of circuit board assembly; as a result, a significant portion of the students' effort is focused on ...
openaire   +1 more source

Field Programmable Gate Arrays

2023
Florent de Dinechin, Martin Kumm
openaire   +1 more source

Field programmable gate arrays

Microelectronics Journal, 1994
openaire   +1 more source

Field Programmable Gate-Arrays

IEEE Design & Test of Computers, 1998
openaire   +1 more source

Field programmable gate arrays

Microprocessors and Microsystems, 1993
openaire   +1 more source

Field-Programmable Gate Arrays

1992
Stephen D. Brown   +3 more
openaire   +1 more source

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