Results 101 to 110 of about 20,255 (223)

Pixie: A heterogeneous Virtual Coarse-Grained Reconfigurable Array for high performance image processing applications

, 2017
Coarse-Grained Reconfigurable Arrays (CGRAs) enable ease of programmability and result in low development costs. They enable the ease of use specifically in reconfigurable computing applications.
Fricke, Florian, Huebner, Michael, Kulkarni, Amit, Stroobandt, Dirk, Werner, Andre   +4 more
core  

Towards the Integration of Remote Laboratories in Massive Open Online Courses: Insights from Usage Logs and Student Feedback

Computer Applications in Engineering Education, Volume 34, Issue 3, May 2026.
ABSTRACT Massive Open Online Courses (MOOCs) have established a new paradigm in education, enabling asynchronous, remote learning. Although MOOCs offer diverse educational content to students, comprehensive and realistic education requires hands‐on training.
Manuel J. Gomez, Mariano Albaladejo‐González, José A. Ruipérez‐Valiente, Carlos Rejón, Félix García‐Loro, Antonio Robles‐Gómez, Sergio Martin   +6 more
wiley   +1 more source

Hardware-Efficient Structure of the Accelerating Module for Implementation of Convolutional Neural Network Basic Operation

, 2018
This paper presents a structural design of the hardware-efficient module for implementation of convolution neural network (CNN) basic operation with reduced implementation complexity.
Cariow, Aleksandr, Cariowa, Galina
core  

Scalable Hydrodynamics on multiple Field-Programmable Gate Arrays (FPGAs)

Proceedings of the SC '25 Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis
This paper presents scalable 2D and 3D Hydrodynamics solver implementations on FPGAs using Intel’s oneAPI framework, addressing challenges in porting stencil-based computations from CPU/GPU architectures on FPGAs.FPGAs offer customizable hardware with on-chip memory that can be custom-tailored for High Performance Computing (HPC) applications.
Mordant, François-Xavier, Prouveur, Charles, Tremblin, Pascal, Gac, Nicolas   +3 more
openaire   +2 more sources

Dynamic Multifunctional Metasurfaces Based on Passive Cascade Structure

Electron, Volume 4, Issue 2, May 2026.
A dynamic multifunctional metasurface is proposed in this paper. Unlike mainstream multifunctional metasurface based on programmable metasurfaces, it consists of two passive metasurfaces, presenting a significant cost advantage. By controlling the displacement, different functions such as beam steering, focusing, and OAM wave generation can be realized
Xiangming Wu, Yifeng Wang, Haoyang Shi, Jie Tian, Xiong Wang, Weiren Zhu   +5 more
wiley   +1 more source

Optimization and Benchmarking of Lightweight Neural Networks for Efficient Embedded AI Deployment

Engineering Reports, Volume 8, Issue 5, May 2026.
A hardware‐aware optimization and benchmarking framework for lightweight neural networks is presented for deployment on heterogeneous embedded platforms including CPU, GPU, TPU, and MCU architectures. Model compression techniques such as quantization, pruning, knowledge distillation, and mixed‐precision computation reduce inference latency, memory ...
Vidapankal Mohammad Fridous, Abhishek Agarwal, K. B. Bhaskar, V. Nandagopal, N. Sivakamasundari   +4 more
wiley   +1 more source

Reprogrammable All‐Photonic Molecular Logic With Ln3+ Luminescent Hybrids in Solid State

Laser &Photonics Reviews, Volume 20, Issue 9, 6 May 2026.
Mario P. de‐Saralegui et al. report an Eu3⁺/Tb3⁺‐doped organic–inorganic hybrid material that enables multiple reprogrammable logic operations using only physical stimuli. Additionally, this solid‐state, all‐photonic platform represents the first example in the literature performing reversible Feynman logic operations, marking a major step toward ...
Mario P. de‐Saralegui, Lianshe Fu, Albano N. Carneiro Neto, Carlos D. S. Brites, Miguel A. Hernández‐Rodríguez   +4 more
wiley   +1 more source

Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence

International Journal of Reconfigurable Computing, 2013
This paper describes a novel way to exploit the computation capabilities delivered by modern Field-Programmable Gate Arrays (FPGAs), not only towards a higher performance, but also towards an improved reliability. Computation-specific pieces of circuitry
Xabier Iturbe, Khaled Benkrid, Chuan Hong, Ali Ebrahim, Tughrul Arslan, Imanol Martinez   +5 more
doaj   +1 more source

A Hardware Generator of Multi-point Distributed Random Numbers for Monte Carlo Simulation [PDF]

Monte Carlo simulation of weak approximations of stochastic differential equations constitutes an intensive computational task. In applications such as finance, for instance, to achieve "real time" execution, as often required, one needs highly efficient
Eckhard Platen, Filippo Martini, Massimo Piccardi, Nicola Bruti-Liberati   +3 more
core  

FPGA‐accelerated streaming data reduction achieving an average compression ratio over 8000 in a 17.4 kHz, 840 kpixel CITIUS detector for quasi‐elastic gamma‐ray scattering

Journal of Synchrotron Radiation, Volume 33, Issue 3, Page 609-616, May 2026.
A high‐throughput field‐programmable gate array (FPGA)‐accelerated data‐reduction and ‐analysis pipeline combined with high‐performance computing enables the continuous handling of a 216 Gbps data stream from quasi‐elastic gamma‐ray scattering experiments at SPring‐8.We present a data‐acquisition and ‐analysis framework for quasi‐elastic gamma‐ray ...
Haruki Nishino, Masashi Kobayashi, Toshiyuki Nishiyama Hiraki, Yoshiaki Honjo, Kyosuke Ozaki, Mitsuhiro Yamaga, Nobumoto Nagasawa, Yoshitaka Yoda, Yasumasa Joti, Makina Saito, Takaki Hatsui   +10 more
wiley   +1 more source