Results 161 to 170 of about 20,255 (223)

Configurable Multi-Layer Perceptron-Based Soft Sensors on Embedded Field Programmable Gate Arrays: Targeting Diverse Deployment Goals in Fluid Flow Estimation. [PDF]

Sensors (Basel)
Ling T, Qian C, Klann TM, Hoever J, Einhaus L, Schiele G.   +5 more
europepmc   +1 more source

Smart Electric Vehicle Charging Management Using Reinforcement Learning on FPGA Platforms. [PDF]

Sensors (Basel)
Damodarin UM, Cardarilli GC, Di Nunzio L, Re M, Spanò S.   +4 more
europepmc   +1 more source

Mitigating side channel attacks on FPGA through deep learning and dynamic partial reconfiguration. [PDF]

Sci Rep
Bommana SR, Veeramachaneni S, Ershad S, Srinivas MB.   +3 more
europepmc   +1 more source

Spatially programmable origami networks enable high-density mechanical computing for autonomous robotics. [PDF]

Nat Commun
Hu X, Tan T, Chen Y, Yan Z.
europepmc   +1 more source

Accelerating electrostatic particle-in-cell simulation: A novel FPGA-based approach for efficient plasma investigations. [PDF]

PLoS One
Almomany A, Sutcu M, Ibrahim BSKSMK.
europepmc   +1 more source

From pixels to camera: scaling superconducting nanowire single-photon detectors for imaging at the quantum-limit. [PDF]

Nano Converg
Gao J, Chang J, Lopez-Rodriguez B, Zadeh IE, Zwiller V, Elshaari AW.   +5 more
europepmc   +1 more source

ChipletQuake: On-Die Digital Impedance Sensing for Chiplet and Interposer Verification. [PDF]

Sensors (Basel)
Khalaj Monfared S, Saadat Safa M, Tajik S.   +2 more
europepmc   +1 more source

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Design issues in field programmable gate arrays (FPGAs)

ICM'99. Proceedings. Eleventh International Conference on Microelectronics (IEEE Cat. No.99EX388), 2000
In this paper, we present some of the important design factors and performance issues in the development of field programmable gate arrays (FPGAs). Emphasis is placed on the design of logic blocks and interconnection resources. We also discuss the possibility of using multiple-valued logic in the design of FPGA logic blocks.
M. Abd-El-Barr, Z. Vranesic
exaly   +2 more sources

Hardware implementation of an artificial neural network using field programmable gate arrays (FPGA's)

IEEE Transactions on Industrial Electronics, 1994
In this paper, the authors present a hardware implementation of a fully digital multilayer perceptron artificial neural network using Xilinx Field Programmable Gate Arrays (FPGAs). Each node is implemented with two XC3042 FPGAs and a 1 K/spl times/8 EPROM. Training is done offline on a PC.
Naleih M. Botros, M. Abdul-Aziz
exaly   +2 more sources