Results 171 to 180 of about 20,255 (223)

Field programmable gate arrays (FPGAs)

1997
For FPGAs, the variety of architectures is larger as each manufacturer develops concepts for particular niche markets and this, coupled with the non-deterministic nature of the timing for place and route, makes them more difficult to incorporate into designs.
R. C. Seals, G. F. Whapshott
openaire   +1 more source

Implementation of Face Recognition Algorithm on Field Programmable Gate Array (FPGA)

Journal of Circuits, Systems and Computers, 2019
The aim of this study is to implement an algorithm for face recognition, based on fast fourier transform (FFT), on the field programmable gate array (FPGA) chip. Implemented program included the initialization process of two single-IP-core ROM blocks, each with an image of a human face, which are sent to the real components of two-channel IP CoreFFT ...
Tijana Sustersic, Aleksandar Peulic
openaire   +2 more sources

Field-Programmable-Gate-Array (FPGA)

2016
To be able to implement large-scale SOC designs, minimizing overall power dissipation is a critical. The primary objective of this chapter is to present the results of silicon nanowire technology in a widely utilized prototyping platform called Field-Programmable Gate Array (FPGA).
Ahmet Bindal, Sotoudeh Hamedi-Hagh
openaire   +1 more source

Evolving classifiers on field programmable gate arrays: Migrating XCS to FPGAs

Journal of Systems Architecture, 2006
The paper presents the first results of the prototype implementation of the eXtended learning Classifier System (XCS) in hardware and precisely on Field Programmable Gate Arrays. For this purpose we introduce a version of the XCS classifier system completely based on integer arithmetic, that we name XCSi, instead of the usual floating point one, to ...
BOLCHINI, CRISTIANA, FERRANDI, PAOLO GIACOMO, LANZI, PIER LUCA, SALICE, FABIO   +3 more
openaire   +1 more source

Field Programmable Gate Array (FPGA) Based Microwave Oven

Applied Mechanics and Materials, 2019
In this paper, an FPGA-based microwave oven controller design which can be implemented using Altera DE1 development board is presented. The motivation for this work is to explore FPGA for real time applications. First, a microwave oven controller design architecture that could fit into Altera DE1 board, utilizing on-board peripherals is developed. Then,
Bhuvaneswari, Thangavel, Hossen, Md. Jakir, Abdul Aziz, Nor Hidayati, Venkataseshaiah, Chinthakunta   +3 more
openaire   +1 more source

Power Modelling in Field Programmable Gate Arrays (FPGA)

1999
This paper presents a power consumption model for FPGAs based on measurements. This model will permit us to optimize power consumption on FPGAs using existing architectures, as well as helping direct the design of new power-sensitive FPGA architectures.
Andrés D. García, Wayne P. Burleson, Jean-Luc Danger   +2 more
openaire   +1 more source

Clock Gating Implementation on commercial Field Programmable Gate Array (FPGA)

2018 4th International Conference on Electrical, Electronics and System Engineering (ICEESE), 2018
This paper discusses the application and implementation of clock gating technique to RISC32 (a customizable processor on Field Programmable Gate Array (FPGA)) for reduction of dynamic power consumption on clock tree. The FPGA used is Artix-7 (xc7a100tcsg324-1) from Xilinx with 28nm technology. The power consumption of clock tree is reduced by 24% after
Beng-Liong Tan, Wai-Kong Lee, Kai-Ming Mok, Hock-Guan Goh   +3 more
openaire   +1 more source

Field programmable gate array (FPGA) for iterative code evaluation

IEEE Transactions on Magnetics, 2006
Iterative codes such as low density parity check (LDPC) codes and turbo product codes (TPC) are of interest for data storage applications. To apply these codes to digital recording systems, two possible schemes are considered in this paper. In the first scheme, a single LDPC code of column weight j>2 is used to replace the Reed-Solomon (RS) code of the
null Lingyan Sun, null Hongwei Song, Z. Keirn, B.V.K.V. Kumar   +3 more
openaire   +1 more source

Field programmable gate array (FPGA) circuits

1996
Field programmable gate arrays (FPGA) are a recently developed family of programmable circuits. Like mask programmable gate arrays (MPGA), FPGAs implement thousands of logic gates. But, unlike MPGAs, a user can program an FPGA design as traditional programmable logic devices (PLDs): in-site and a in a few seconds.
openaire   +1 more source

Detection of Crosstalk Faults in Field Programmable Gate Arrays (FPGA)

Journal of The Institution of Engineers (India): Series B, 2014
In this work, a Built-in-Self-Test (BIST) technique has been proposed to detect crosstalk faults in FPGA and run time congestion and to provide the crosstalk aware router for FPGA. The proposed BIST circuits require less overhead as compared to earlier techniques. The proposed detector can detect any logic hazard or delay due to crosstalk.
N. Das, P. Roy, H. Rahaman
openaire   +1 more source