Results 141 to 150 of about 7,998,069 (280)

Velocity Signal Measurement Based on FPGA

机车电传动, 2016
In order to reduce CPU resource occupancy rate and the software complexity for velocity measuring, a FPGA(Field Programmable Gate Array) technology to measure velocity and related information was adopted as a supplement of CPU.
LI Hui, LUO Zhengyu, XU Juan
doaj  

Overcoming Artificial Structures in Resolution‐Enhanced Hi‐C Data by Signal Decomposition and Multi‐Scale Attention

Advanced Science, EarlyView.
Deep‐learning‐based signal enhancement is an effective way to recover high‐resolution details from a low‐resolution chromatin contact map. However, due to computational challenges, existing methods commonly divide up the contact map into small patches and create artificial discontinuities at patch boundaries.
Qinyao Li, Kelly Yichen Li, Chiara Nicoletti, Stephen Kwok‐Wing Tsui, Pier Lorenzo Puri, Qin Cao, Kevin Y. Yip   +6 more
wiley   +1 more source

Smart Nanotechnologies for Multimodal Neuromodulation and Brain Interfacing

Advanced Science, EarlyView.
Recent advances in smart nanotechnologies are expanding the toolbox for brain interfacing, from wireless neuromodulation and high‐resolution sensing to targeted delivery within the central nervous system. By combining responsive nanomaterials with bioinspired design, these platforms enable multimodal interactions with neurons and glia, while also ...
Tommaso Curiale, Marie Celine Lefevre, Alessio Carmignani, Maria Cristina Ceccarelli, Matteo Battaglini, Attilio Marino, Gianni Ciofani   +6 more
wiley   +1 more source

A field-programmable gate array based on wafer-scale 2D semiconductor. [PDF]

Natl Sci Rev
Sun Q, Ao M, Dong X, Shi K, Gou S, Zhu Y, Zhang Z, Zhang J, Hu Y, Sun Z, Chen X, Wang L, Bao W, Zhou P.   +13 more
europepmc   +1 more source

Magnetoelectric Nanoparticle‐Based Wireless Brain–Computer Interface: Underlying Physics and Projected Technology Pathway

Advanced Science, EarlyView.
Magnetoelectric nanoparticles (MENPs) enable fully wireless, minutely invasive neuromodulation, and potentially neural recording, by converting magnetic into electric and, conversely, electric into magnetic fields, respectively, at high spatiotemporal resolution.
Elric Zhang, Max Shotbolt, Mostafa Abdel‐Mottaleb, Shawnus Chen, Victoria Andre, Jieyuan Tian, Jonathan Shulgach, Max Murphy, Brian Noga, Ping Liang, Darcy Griffin, Douglas Weber, Marta Pardo, Salvador Pane, Sakhrat Khizroev   +14 more
wiley   +1 more source

LightIN: a versatile silicon-integrated photonic field programmable gate array with an intelligent configuration framework for next-generation AI clusters. [PDF]

Light Sci Appl
Zhu Y, Liu Y, Yang X, Liu K, Hua X, Luo M, Liu J, Chang S, Yan J, Zhang S, Wu M, Wang Z, Zhang H, Wang D, Chen D, Xiao X, Yu S.   +16 more
europepmc   +1 more source

PC based logic analyzer using field programmable gate array

, 1995
Basically, a logic analyzer is a digital troubleshooting equipment. Microelectronics revolution has set free multitude of prospective fields that an Electronics and Communication Engineering student could now venture into.
Lagumen, Elpa Aries M., Sabidong, Joel V., Paynor, Michael Tyrone P.   +2 more
core  

Type‐II Dirac Fermions in Monolayer In2O: Interplay of Magnetotransport, Spin Hall Effect, and Superconductivity

Advanced Science, EarlyView.
First‐principles calculations reveal that monolayer In2O${\rm In}_2{\rm O}$ hosts type‐II Dirac fermions near the Fermi level, which split into Weyl points under spin‐orbit coupling. The material exhibits negative and giant magnetoresistance, a pronounced spin Hall effect, and phonon‐mediated superconductivity at 1.5 K, establishing it as a unique ...
Qing‐Bo Liu, De‐Ming Feng, Wen‐Neng Zhao, Yu‐Yang Zhao, Lun Xiong, Xing‐Yi Tan, Hua‐Hua Fu   +6 more
wiley   +1 more source

An Adaptive Clear High-Dynamic Range Fusion Algorithm Based on Field-Programmable Gate Array for Real-Time Video Stream. [PDF]

Sensors (Basel)
Huang H, Xu Y, Zhao T.
europepmc   +1 more source

Field Programmable Gate Array Implementation of Advanced Encryption Standard

, 2008
: We present an 8-bit field programmable gate array (FPGA) implementation of 128-bit block and 128-bit key Advanced Encryption Standard (AES) Rijndael. The 8-bit Rijndael encryption data path operates at 13.7MHz and consumes 226 clock cycles resulting in
Ramesh Karri, Yongkook Kim
core