DESAIN DAN IMPLEMENTASI VIDEO COMPRESSOR-DECOMPRESSOR (CODEC) PADA FIELD PROGRAMMABLE GATE ARRAY (FPGA) DESIGN AND IMPLEMENTATION OF VIDEO COMPRESSOR-DECOMPRESSOR (CODEC) ON FIELD PROGRAMMABLE GATE ARRAY (FPGA) [PDF]
, 2006 ABSTRAKSI: Video merupakan data yang memiliki bit rate tinggi, sehingga harus dilakukan proses kompresi untuk mengurangi data rate dari rangkaian video agar dapat ditransmisikan secara real time pada kanal komunikasi yang ada.
ARTHA NURDIANSYAH
core
A high performance cost-effective digital complex correlator for an X-band polarimetry survey [PDF]
, 2016 The detailed knowledge of the Milky Way radio emission is important to characterize galactic foregrounds masking extragalactic and cosmological signals.
Barbosa, Domingos +7 more
core +2 more sources
Implementation of Reed-Solomon Encoder/Decoder Using Field Programmable Gate Array
Journal of Engineering and Sustainable Development, 2006 In this paper, (15, 11) and (255, 239) Reed-Solomon codes have been designed and Implemented using ALTERA Field Programmable Gate Array (FPGA) device. The design is carried out by writing VHDL modules for different encoder and decoder components.
Hikmat N. Abdullah
doaj
Artificial Intelligence Hardware Accelerator [PDF]
, 2017 This paper documents the investigation and implementation of the mathematics behind artificial intelligence using a programmable gate array interfaced through a software API.
Bernstein, Maor, Miller, Patrick
core +1 more source
Implementation of sub-nanosecond time-to-digital convertor in field-programmable gate array: applications to time-of-flight analysis in muon radiography [PDF]
, 2013 Time-of-flight (TOF) techniques are standard techniques in high energy physics to determine particles’ propagation directions. Since particle velocities are generally close to c, the speed of light, and detector typical dimensions at the metre level, the
J. Marteau +6 more
semanticscholar +1 more source
Review of Scientific Instruments, 2014 A new data acquisition system including a Field Programmable Gate Array (FPGA) based time-resolved scaler was developed for laser-induced fluorescence and beam bunch coincidence measurements.
D. Rossi +17 more
semanticscholar +1 more source
FPGA Based Massage Display System Improvement Using Scanning Technique To Minimize Power Consumption [PDF]
, 2018 This paper presents a field programmable gate array (FPGA) based embedded system for low power message display. Scanning technique is used to minimize the power consumption.
Motiur, M., Saharia, K.
core +1 more source
Evaluation of Single-Chip, Real-Time Tomographic Data Processing on FPGA - SoC Devices [PDF]
, 2018 A novel approach to tomographic data processing has been developed and evaluated using the Jagiellonian PET (J-PET) scanner as an example. We propose a system in which there is no need for powerful, local to the scanner processing facility, capable to ...
Białas, P. +38 more
core +2 more sources
SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability
Journal of Low Power Electronics and Applications, 2014 Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories.
Masakazu Hioki +7 more
doaj +1 more source
High-resolution, low-latency, bunch-by-bunch feedback system for nanobeam stabilization
Physical Review Accelerators and Beams, 2022 We report the design, operation, and performance of a high-resolution, low-latency, bunch-by-bunch feedback system for nanobeam stabilization. The system employs novel, ultralow quality-factor cavity beam position monitors (BPMs), a two-stage analog ...
D. R. Bett +6 more
doaj +1 more source