Results 111 to 120 of about 46,893 (234)
Compact Terahertz Dual‐Comb Spectroscopy with All‐Digitally Generated Adaptive Clock
Advanced Physics Research, Volume 5, Issue 2, February 2026.This work demonstrates a compact terahertz dual‐comb spectrometer using an all‐digital adaptive clock generated on an FPGA. This system achieves high precision across 1.6 THz, resolves over 24 000 comb lines with kHz resolution, and offers enhanced stability and a simplified architecture compared to analog‐based methods.
Min Li +8 more
wiley +1 more source
Concurrency and Computation: Practice and Experience, Volume 38, Issue 3, February 2026.ABSTRACT Task‐based programming interfaces introduce a paradigm in which computations are decomposed into fine‐grained units of work known as “tasks”. StarPU is a runtime system originally developed to support task‐based parallelism on on‐premise heterogeneous architectures by abstracting low‐level hardware details and efficiently managing resource ...
Vanderlei Munhoz +5 more
wiley +1 more source
A prototype submersible sheathless flow cytometer designed for autonomous platforms
Limnology and Oceanography: Methods, Volume 24, Issue 2, February 2026.Abstract Development of submersible flow cytometers has allowed for continuous, in situ measurements of natural assemblages of phytoplankton cells. Here we introduce DeepCyte, a sensitive prototype submersible flow cytometer developed for deployment on autonomous platforms.
J. E. Swalwell, K. Cain, E. V. Armbrust
wiley +1 more source
Inverted Pendulum Design with Hardware Fuzzy Logic Controller [PDF]
Journal of Systemics, Cybernetics and Informatics, 2008 An inverted pendulum robot has been designed and built using a fuzzy logic controller implemented in a Field Programmable Gate Array (FPGA). The Mamdani fuzzy controller has been implemented using integer numbers to simplify its construction and improve ...
Eric Minnaert +2 more
doaj
OPTIMAL AREA AND PERFORMANCE MAPPING OF K-LUT BASED FPGAS [PDF]
FPGA circuits are increasingly used in many fields: for rapid prototyping of new products (including fast ASIC implementation), for logic emulation, for producing a small number of a device, or if a device should be reconfigurable in use (reconfigurable ...
Alexandru E. ŞUŞU +3 more
core
Self-Partial and Dynamic Reconfiguration Implementation for AES using FPGA [PDF]
, 2009 This paper addresses efficient hardware/software implementation approaches for the AES (Advanced Encryption Standard) algorithm and describes the design and performance testing algorithm for embedded system.
Alaoui Ismaili, Zine El Abidine +1 more
core +1 more source
Efficient Implementation of Nested-Loop Multimedia Algorithms
EURASIP Journal on Advances in Signal Processing, 2001 A novel dependence graph representation called the multiple-order dependence graph for nested-loop formulated multimedia signal processing algorithms is proposed. It allows a concise representation of an entire family of dependence graphs. This powerful
Kittitornkun Surin, Hu YuHen
doaj +1 more source
Watermarking FPGA Bitfile for Intellectual Property Protection [PDF]
, 2012 Intellectual property protection (IPP) of hardware designs is the most important requirement for many Field Programmable Gate Array (FPGA) intellectual property (IP) vendors.
Che, W., Lin, Y., Wu, Q., Zhang, J.
core +1 more source
Archives of Acoustics, 2014 Sigma-delta modulators (SDMs) are now widely used in high-resolution audio analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).
Zbigniew KULKA, Piotr WOSZCZEK
doaj
Radiation Tolerant, FPGA-Based SmallSat Computer System [PDF]
The Radiation Tolerant, FPGA-based SmallSat Computer System (RadSat) computing platform exploits a commercial off-the-shelf (COTS) Field Programmable Gate Array (FPGA) with real-time partial reconfiguration to provide increased performance, power ...
Crum, Gary A. +3 more
core +1 more source