Results 61 to 70 of about 15,482 (245)
A General and Efficient Framework for the Rapid Design of Miniaturized, Wideband, and High‐Bit RIS
A general and efficient framework is proposed for the rapid design of high‐performance reconfigurable intelligent surfaces (RISs). This framework integrates advanced antenna design techniques and incorporates various load types, quantities, and values to achieve the design of high‐performance RISs.
Jun Wei Zhang +14 more
wiley +1 more source
160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)-2
Copyright information:Taken from "160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)"http://www.biomedcentral.com/1471-2105/8/185BMC Bioinformatics 2007;8():185-185.Published online 7 Jun 2007PMCID ...
Isaac TS Li (75777) +2 more
core +1 more source
Space-time trellis codes: Field programmable gate array approach [PDF]
In this paper, an effective method of implementation of Space-Time Trellis Codes (STTC) for 4-state on Field Programmable Gate Array is presented. To reach the very high data rates provided in STTC, a lot of expensive highspeed Digital Signal Processors (
Mallikarjuna Gowda C. P. +3 more
core +1 more source
Implementación del algoritmo Threefish-256 en hardware reconfigurable
This article presents both the description and results of the Threefish cryptographic algorithm hardware implementation for encryption process.
Nathaly Nieto-Ramírez +1 more
doaj +1 more source
Terahertz Channel Modeling, Estimation and Localization in RIS‐Assisted Systems
Reconfigurable intelligent surfaces have become a recent intensive research focus. Based on practical applications, channel strategies for RIS‐assisted terahertz wireless communication systems are categorized into three different types: channel modeling, channel estimation, and channel localization.
Hongjing Wang +9 more
wiley +1 more source
IMPLEMENTASI FIELD PROGRAMMABLE GATE ARRAY (FPGA) PADA DIGITAL LOGIC TRAINNER
IMPLEMENTASI FIELD PROGRAMMABLE GATE ARRAY (FPGA) PADA DIGITALLOGIC ...
Dewi, Kartika +2 more
core
160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)-1
Copyright information:Taken from "160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)"http://www.biomedcentral.com/1471-2105/8/185BMC Bioinformatics 2007;8():185-185.Published online 7 Jun 2007PMCID ...
Isaac TS Li (75777) +2 more
core +1 more source
FPGA as a tool for hardware realization of feedback control
The presented paper deals with the development of robust control algorithm based on reflection vectors methodology. This approach of controller design is guaranteeing stability, robustness and high performance.
Ján Cigánek +2 more
doaj +1 more source
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley +1 more source
Implementation of Edge Detection Digital Image Algorithm on a FPGA
This paper presents the implementation of an adaptive contour detection filter on field programmable gate array (FPGA) using a combination of hardware and software components.
Bouganssa Issam +2 more
doaj +1 more source

