Results 51 to 60 of about 47,559 (229)

Estudio de técnicas para multitarea HW sobre FPGAs Tridimensionales (FPGA3D) [PDF]

open access: yes, 2006
Este texto documenta el trabajo realizado por los autores para diseñar e implementar un simulador de FPGA 3D (Field Programmable Gate Array). Tras una introducción sobre aspectos generales del proyecto, se da una introducción sobre circuitos lógicos ...
Arbeteta Hernández, Ángel   +2 more
core   +1 more source

A Correlative SICM‐OPM Platform for Surface and Volumetric Imaging in Live Cells

open access: yesAdvanced Science, EarlyView.
A multifunctional correlative imaging platform integrating Scanning Ion Conductance Microscopy (SICM) with Oblique Plane Microscopy (OPM) enables simultaneous surface topography, mechanical mapping, and 3D volumetric fluorescence imaging in live cells.
Wenzhi Hong   +13 more
wiley   +1 more source

How FPGAs Can Help Create Self-Recoverable Antenna Arrays

open access: yesInternational Journal of Antennas and Propagation, 2012
An approach to utilize Field Programmable Gate Array (FPGA) technology to control antenna arrays is presented based on the scenario of sensing a failure of any array element, analyzing degradation of the radiation pattern due to that failure, and finding
Miroslav Joler
doaj   +1 more source

FPGA Implementation of A∗ Algorithm for Real-Time Path Planning

open access: yesInternational Journal of Reconfigurable Computing, 2020
The traditional A∗ algorithm is time-consuming due to a large number of iteration operations to calculate the evaluation function and sort the OPEN list.
Yuzhi Zhou, Xi Jin, Tianqi Wang
doaj   +1 more source

Systems and methods for detecting a failure event in a field programmable gate array [PDF]

open access: yes, 2009
An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA and determining a conclusion of a configuration refresh ...
Herath, Jeffrey A., Ng, Tak-Kwong
core   +1 more source

Histogram of oriented gradients front end processing: an FPGA based processor approach [PDF]

open access: yes, 2014
The Field Programmable Gate Array (FPGA) implementation of the commonly used Histogram of Oriented Gradients (HOG) algorithm is explored. The HOG algorithm is employed to extract features for object detection. A key focus has been to explore the use of a
Bardak, Burak   +3 more
core   +1 more source

Self‐Powered Bearing Sensing and Real‐Time Fault Diagnosis Enabled by Non‐Invasive Triboelectric Sensors and Edge AI Acceleration

open access: yesAdvanced Science, EarlyView.
This study achieves the synergistic integration of self‐powered sensing and edge AI acceleration to establish a real‐time fault diagnosis system. The proposed TENG‐based self‐powered bearing sensor (NSE‐TBS) and FPGA‐accelerated edge AI framework fundamentally break through the inherent limitations of conventional monitoring systems, including complex ...
Kehui Zhu   +7 more
wiley   +1 more source

PGPG: An Automatic Generator of Pipeline Design for Programmable GRAPE Systems [PDF]

open access: yes, 2007
We have developed PGPG (Pipeline Generator for Programmable GRAPE), a software which generates the low-level design of the pipeline processor and communication software for FPGA-based computing engines (FBCEs).
Fukushige, Toshiyuki   +2 more
core   +2 more sources

Memristive Physical Reservoir Computing

open access: yesAdvanced Science, EarlyView.
Memristors’ nonlinear dynamics and input‐dependent memory effects make them ideal candidates for high‐performance physical reservoir computing (RC). Based on their conductance modulation, memristors can be classified as electronic or optoelectronic types.
Dian Jiao   +9 more
wiley   +1 more source

Design and FPGA-implementation of an improved adaptive fuzzy logic controller for DC motor speed control

open access: yesAin Shams Engineering Journal, 2014
This paper presents an improved adaptive fuzzy logic speed controller for a DC motor, based on field programmable gate array (FPGA) hardware implementation.
E.A. Ramadan, M. El-bardini, M.A. Fkirin
doaj   +1 more source

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