Results 41 to 50 of about 47,559 (229)
Spatial‐Wavelength Multiplexing Error‐Controlled Photonic Analog Computing System
A novel photonic integrated circuit prototype implementing the concept of general‐purpose analog computing and demonstrate its capability in radio frequency applications. The chip features a multichannel architecture and performs fully optical analog computation with frequency‐domain parallel processing. An FPGA‐based error‐correction algorithm aims to
Tao Zhu +15 more
wiley +1 more source
An on‐demand ultra‐reconfigurable intelligent vision system with hierarchical reconfigurability from device to system levels is demonstrated. Through co‐design of a multi‐paradigm device, reconfigurable circuits, and adaptive system architecture/algorithms, the system enables seamless switching among spiking, non‐spiking, neuromorphic imaging (NI), and
Biyi Jiang +7 more
wiley +1 more source
Data Packet Processing Acceleration Architecture for Virtual Network Function Based on FPGA [PDF]
In order to improve the packet processing performance of Virtual Network Function(VNF),this paper comes up with a Field Programmable Gate Array(FPGA)-based General Hardware Accelerator(GHA) architecture.The GHA architecture implements the packet ...
FAN Hongwei,HU Yuxiang,LAN Julong
doaj +1 more source
A programmable 2048‐element circular ultrasound array combined with a compact acoustic lens produces a thin “sound sheet” over a large field of view, and records echoes with wide angular diversity across the ring aperture. Coherence‐enhanced beamforming converts full‐matrix data into high‐contrast tomographic slices, delivering near‐diffraction‐limited
Qiu‐De Zhang +11 more
wiley +1 more source
Multiband Real-Time Coherent Optical OFDM Reception up to 110 Gb/s with 600-km Transmission
We demonstrate field-programmable gate array (FPGA)-based multiband orthogonal frequency-division multiplexing (OFDM) signal reception after 600-km standard single-mode fiber (SSMF) transmission and 400-ps differential-group delay (DGD) at 110-Gb/s.
Simin Chen, Yiran Ma, William Shieh
doaj +1 more source
Towards Lattice Quantum Chromodynamics on FPGA devices [PDF]
In this paper we describe a single-node, double precision Field Programmable Gate Array (FPGA) implementation of the Conjugate Gradient algorithm in the context of Lattice Quantum Chromodynamics.
Korcyl, Grzegorz, Korcyl, Piotr
core +2 more sources
Empowering parallel computing with field programmable gate arrays [PDF]
After more than 30 years, reconfigurable computing has grown from a concept to a mature field of science and technology. The cornerstone of this evolution is the field programmable gate array, a building block enabling the configuration of a custom hardware ...
D'Hollander, Erik
core +2 more sources
Fabrication of High‐Density Multimodal Neural Probes Based on Heterogeneously Integrated CMOS
A chiplet‐based methodology democratizes active neural probe development on standard bulk CMOS services. This yields the first probe combining high‐density electrophysiology (416 electrodes) with calcium imaging (832 photodiodes) and complete on‐chip signal processing across 13 shanks.
Ju Hee Mun +10 more
wiley +1 more source
This paper presents an intelligent motion controller for four-wheeled holonomic mobile robots with four driving omnidirectional wheels equally spaced at 90 degrees from one another by using field-programmable gate array (FPGA)-based artificial immune ...
Hsu-Chih Huang
doaj +1 more source
Histogram projection (HP) is a well-suited enhancement technique for images obtained by uncooled infrared imagers. In this paper, the problem of implementing HP using Field Programmable Gate Array (FPGA) is addressed.The proposed system is implemented ...
A.M. Alsuwailem
doaj +1 more source

