Results 41 to 50 of about 15,482 (245)

160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)-0

, 2011
Copyright information:Taken from "160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)"http://www.biomedcentral.com/1471-2105/8/185BMC Bioinformatics 2007;8():185-185.Published online 7 Jun 2007PMCID ...
Isaac TS Li (75777), Kevin Truong (75779), Warren Shum (75778)   +2 more
core   +1 more source

Design and FPGA-implementation of an improved adaptive fuzzy logic controller for DC motor speed control

Ain Shams Engineering Journal, 2014
This paper presents an improved adaptive fuzzy logic speed controller for a DC motor, based on field programmable gate array (FPGA) hardware implementation.
E.A. Ramadan, M. El-bardini, M.A. Fkirin
doaj   +1 more source

FPGA Implementation of A∗ Algorithm for Real-Time Path Planning

International Journal of Reconfigurable Computing, 2020
The traditional A∗ algorithm is time-consuming due to a large number of iteration operations to calculate the evaluation function and sort the OPEN list.
Yuzhi Zhou, Xi Jin, Tianqi Wang
doaj   +1 more source

Neuromorphic Near‐Sensor and In‐Sensor Computing Enabled by Next‐Generation Material‐Based Sensors

Advanced Science, EarlyView.
This Review presents a structural framework that classifies neuromorphic sensing into near‐sensor and in‐sensor architectures, clarifying physical coupling between sensing and computation. The framework connects neural and synaptic device functions with recent advances in optical, mechanical, and chemical sensing, compares energy consumption and ...
Su Yeon Jung, Gwang Ya Kim, Sejin Kim, Hyunjong Seo, Se Gi Lee, Sang Min Won, Dongjoon Rhee, Joohoon Kang   +7 more
wiley   +1 more source

160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)-6

, 2011
Copyright information:Taken from "160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)"http://www.biomedcentral.com/1471-2105/8/185BMC Bioinformatics 2007;8():185-185.Published online 7 Jun 2007PMCID ...
Isaac TS Li (75777), Kevin Truong (75779), Warren Shum (75778)   +2 more
core   +1 more source

Scalable Hydrodynamics on multiple Field-Programmable Gate Arrays (FPGAs)

Proceedings of the SC '25 Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis
This paper presents scalable 2D and 3D Hydrodynamics solver implementations on FPGAs using Intel’s oneAPI framework, addressing challenges in porting stencil-based computations from CPU/GPU architectures on FPGAs.FPGAs offer customizable hardware with on-chip memory that can be custom-tailored for High Performance Computing (HPC) applications.
Mordant, François-Xavier, Prouveur, Charles, Tremblin, Pascal, Gac, Nicolas   +3 more
openaire   +2 more sources

Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review

Advanced Science, EarlyView.
Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh, Ki‐bum Lee, Junghyeon Lee, Seunghee Cho, Malkeshkumar Patel, Hangfei Li, Yu Wen, Ye Zhou, Joondong Kim   +8 more
wiley   +1 more source

160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)-5

, 2011
Copyright information:Taken from "160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)"http://www.biomedcentral.com/1471-2105/8/185BMC Bioinformatics 2007;8():185-185.Published online 7 Jun 2007PMCID ...
Isaac TS Li (75777), Kevin Truong (75779), Warren Shum (75778)   +2 more
core   +1 more source

RG-ALU: A REVERSIBLE LOGIC GATE-BASED ARITHMETIC LOGIC UNIT IN AN FPGA [PDF]

Proceedings on Engineering Sciences
In this study, the method presents a novel for building a high-performance Arithmetic Logic Unit (ALU) by combining reversible logic gates with an HDL implementation on an FPGA. The objective of this strategy is to increase ALU efficiency by capitalizing
Kannan Ramakrishnan , Vidhya K Saveetha
doaj   +1 more source

Femtosecond‐Laser‐Induced Physical Unclonable Random Maze Structure for Storage‐Free Encryption

Advanced Science, EarlyView.
Femtosecond‐laser‐induced gold random maze structures serve as multimodal physical unclonable functions for storage‐free encryption. Their stochastic optical, electrical, and Raman responses are generated by plasmon‐assisted Marangoni formation and converted into AES‐compatible keys without permanent secret‐key storage, offering a portable route toward
Shiru Jiang, Hongliang Li, Shengjie Ma, Sang‐Shin Lee, Lei Wang, Mengyun Hu, Heping Zeng   +6 more
wiley   +1 more source