Results 21 to 30 of about 8,077,861 (214)
FPGA-based scanner and SerialEM server for 4D-STEM electron tomography. [PDF]
Acta Crystallogr D Struct BiolSoftware for a multipurpose hardware board enables flexible scanning with a ready acquisition and processing pipeline to implement 4D‐STEM electron tomography.Four‐dimensional scanning transmission electron microscopy (4D‐STEM) enables the acquisition of diffraction patterns at every probe position in a dense array.
Seifer S, Elbaum M.
europepmc +2 more sources
An efficient AES implementation using FPGA with enhanced security features
Journal of King Saud University: Engineering Sciences, 2020 Data transferred in an electronic way is vulnerable to attacks. With an aim to protect data for secure communication, a new Hybrid non pipelined Advanced Encryption Standard (AES) algorithm based on traditional AES algorithm with enhanced security ...
Harshali Zodpe, Ashok Sapkal
doaj +1 more source
Efficient FPGA implementation and power modelling of image and signal processing IP cores [PDF]
, 2007 This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.Field Programmable Gate Arrays (FPGAs) are the technology of choice in a number ofimage and signal processing application areas such as consumer ...
Chandrasekaran, Shrutisagar
core +7 more sources
The Journal of Engineering, 2019 This study proposes an implementation based on a low-cost field-programmable gate array (FPGA) of a high-resolution pulse width modulation applied on a single-phase power factor correction (PFC) converter operating with 2 MHz switch frequency.
José Augusto Arbugeri +2 more
doaj +1 more source
Bamboo-Slip-Inspired Conformal Reconfigurable Metasurfaces. [PDF]
Adv Sci (Weinh)Bamboo‐slip‐inspired conformal reconfigurable metasurface system. The structure is mainly composed of three parts, which are conformal metasurface, pattern reconfigurable antenna, and control components (such as Field Programmable Gate Array (FPGA)). Conformal metasurfaces draw inspiration from the design of ancient Chinese bamboo slips.
Li Q +9 more
europepmc +2 more sources
Hardware acceleration of number theoretic transform for zk‐SNARK
Engineering Reports, EarlyView., 2023 An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
Implementation of the block cipher Rijndael using Altera FPGA
Journal of Telecommunications and Information Technology, 2001 A short description of the block cipher Rijndael is presented. Hardware implementation by means of the FPGA (field programmable gate array) technology is evaluated. Im- plementation results compared with other hardware imple- mentations are summarized.
Piotr Mroczkowski
doaj +1 more source
From Sensing Mechanisms to System Co-Design: Graphene-Based Sensors and Readout Circuits. [PDF]
Adv Sci (Weinh)This review establishes a unified PS–EQ–RF framework linking graphene sensing mechanisms, native electrical outputs, and output‐specific readout circuits. Voltage‐, current‐, resistance‐, and capacitance‐type sensing systems are systematically classified to guide architecture selection, low‐noise design, system co‐design, and practical integration ...
Zhang J +5 more
europepmc +2 more sources
Configuration Sharing Optimized Placement and Routing [PDF]
, 2010 Reconfigurable systems have been shown to achieve very high computational performance. However, the overhead associated with reconfiguration of hardware remains a critical factor in overall system performance.
Cobb, Jonathan E. +3 more
core +1 more source
Robust Direct Torque Control with Super-Twisting Sliding Mode Control for an Induction Motor Drive
Complexity, 2019 A field-programmable gate array- (FPGA-) based nonlinear Direct Torque Control (DTC) associated with Space Vector Modulation (SVM), Input-Output Feedback Linearization (IOFL), and second-order super-twisting speed controller is proposed to control an ...
Saber Krim +2 more
doaj +1 more source